zara
/
zephyr
mirror of https://github.com/zephyrproject-rtos/zephyr
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
Browse Source

drivers: interrupt controller: Add support for RZ/T 

- Add interrupt controller driver support for RZ/T
- Remove a duplicate USE_RZ_FSP_EXT_IRQ in Kconfig

Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
pull/88042/head
Quang Le 5 months ago committed by Benjamin Cabé
parent
70f9b46342
commit
9736851528
3 changed files with 157 additions and 8 deletions
Whitespace
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Split View
Diff Options
Show Stats Download Patch File Download Diff File
  1. 9
      drivers/interrupt_controller/intc_renesas_rz_ext_irq.c
  2. 151
      dts/arm/renesas/rz/rzt/r9a07g075.dtsi
  3. 5
      modules/Kconfig.renesas_fsp

9
drivers/interrupt_controller/intc_renesas_rz_ext_irq.c
Unescape View File

@ -15,7 +15,8 @@ @@ -15,7 +15,8 @@
#if defined(CONFIG_SOC_SERIES_RZG3S)
#include <instances/rzg/r_intc_irq.h>
#include <instances/rzg/r_intc_nmi.h>
#elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L)
#elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L) || \
defined(CONFIG_SOC_SERIES_RZT2M)
#include <instances/rzn/r_icu.h>
#endif /* CONFIG_SOC_SERIES_* */
#include <zephyr/drivers/interrupt_controller/intc_rz_ext_irq.h>
@ -39,7 +40,8 @@ struct intc_rz_ext_irq_data { @@ -39,7 +40,8 @@ struct intc_rz_ext_irq_data {
#if defined(CONFIG_SOC_SERIES_RZG3S)
void r_intc_irq_isr(void);
void r_intc_nmi_isr(void);
#elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L)
#elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L) || \
defined(CONFIG_SOC_SERIES_RZT2M)
void r_icu_isr(void);
#endif /* CONFIG_SOC_SERIES_* */
@ -234,6 +236,7 @@ static void intc_rz_ext_irq_callback(external_irq_callback_args_t *args) @@ -234,6 +236,7 @@ static void intc_rz_ext_irq_callback(external_irq_callback_args_t *args)
#if defined(CONFIG_SOC_SERIES_RZG3S)
DT_INST_FOREACH_STATUS_OKAY(INTC_RZG_EXT_IRQ_INIT)
#elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L)
#elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L) || \
defined(CONFIG_SOC_SERIES_RZT2M)
DT_INST_FOREACH_STATUS_OKAY(INTC_RZTN_EXT_IRQ_INIT)
#endif

151
dts/arm/renesas/rz/rzt/r9a07g075.dtsi
Unescape View File

@ -95,6 +95,157 @@ @@ -95,6 +95,157 @@
};
};
icu: icu@81048000 {
reg = <0x81048000 0x1000>;
interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <0>;
irq0: irq0@0 {
compatible = "renesas,rz-ext-irq";
reg = <0x0>;
interrupts = <GIC_SPI 6 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled";
};
irq1: irq@1 {
compatible = "renesas,rz-ext-irq";
reg = <0x1>;
interrupts = <GIC_SPI 7 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled";
};
irq2: irq@2 {
compatible = "renesas,rz-ext-irq";
reg = <0x2>;
interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled";
};
irq3: irq@3 {
compatible = "renesas,rz-ext-irq";
reg = <0x3>;
interrupts = <GIC_SPI 9 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled";
};
irq4: irq@4 {
compatible = "renesas,rz-ext-irq";
reg = <0x4>;
interrupts = <GIC_SPI 10 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled";
};
irq5: irq@5 {
compatible = "renesas,rz-ext-irq";
reg = <0x5>;
interrupts = <GIC_SPI 11 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled";
};
irq6: irq@6 {
compatible = "renesas,rz-ext-irq";
reg = <0x6>;
interrupts = <GIC_SPI 12 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled";
};
irq7: irq@7 {
compatible = "renesas,rz-ext-irq";
reg = <0x7>;
interrupts = <GIC_SPI 13 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled";
};
irq8: irq@8 {
compatible = "renesas,rz-ext-irq";
reg = <0x8>;
interrupts = <GIC_SPI 14 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled";
};
irq9: irq@9 {
compatible = "renesas,rz-ext-irq";
reg = <0x9>;
interrupts = <GIC_SPI 15 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled";
};
irq10: irq@a {
compatible = "renesas,rz-ext-irq";
reg = <0xa>;
interrupts = <GIC_SPI 16 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled";
};
irq11: irq@b {
compatible = "renesas,rz-ext-irq";
reg = <0xb>;
interrupts = <GIC_SPI 17 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled";
};
irq12: irq@c {
compatible = "renesas,rz-ext-irq";
reg = <0xc>;
interrupts = <GIC_SPI 18 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled";
};
irq13: irq@d {
compatible = "renesas,rz-ext-irq";
reg = <0xd>;
interrupts = <GIC_SPI 19 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled";
};
irq14: irq@e {
compatible = "renesas,rz-ext-irq";
reg = <0xe>;
interrupts = <GIC_SPI 394 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled";
};
irq15: irq@f {
compatible = "renesas,rz-ext-irq";
reg = <0xf>;
interrupts = <GIC_SPI 395 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled";
};
};
pinctrl: pinctrl@800a0000 {
compatible = "renesas,rzt-pinctrl";
reg = <0x800a0000 0x1000 0x81030c00 0x1000>;

5
modules/Kconfig.renesas_fsp
Unescape View File

@ -228,9 +228,4 @@ config USE_RZ_FSP_SCI_UART @@ -228,9 +228,4 @@ config USE_RZ_FSP_SCI_UART
help
Enable RZ FSP SCI UART driver
config USE_RZ_FSP_EXT_IRQ
bool
help
Enable RZ FSP External IRQ driver
endif

Write Preview
Loading…
Cancel
Save