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@ -11,7 +11,6 @@
@@ -11,7 +11,6 @@
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ssize_t z_impl_hwinfo_get_device_id(uint8_t *buffer, size_t length) |
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{ |
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struct ambiq_hwinfo { |
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/* Ambiq Chip ID0 */ |
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uint32_t chip_id_0; |
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@ -27,7 +26,12 @@ ssize_t z_impl_hwinfo_get_device_id(uint8_t *buffer, size_t length)
@@ -27,7 +26,12 @@ ssize_t z_impl_hwinfo_get_device_id(uint8_t *buffer, size_t length)
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/* Contains the HAL hardware information about the device. */ |
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am_hal_mcuctrl_device_t mcu_ctrl_device; |
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#if (CONFIG_SOC_SERIES_APOLLO5X) |
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am_hal_info1_read(AM_HAL_INFO_INFOSPACE_CURRENT_INFO1, AM_REG_OTP_INFO1_TRIM_REV_O / 4, 1, |
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&dev_hw_info.factory_trim_version); |
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#else |
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am_hal_mram_info_read(1, AM_REG_INFO1_TRIM_REV_O / 4, 1, &dev_hw_info.factory_trim_version); |
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#endif |
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am_hal_mcuctrl_info_get(AM_HAL_MCUCTRL_INFO_DEVICEID, &mcu_ctrl_device); |
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dev_hw_info.chip_id_0 = mcu_ctrl_device.ui32ChipID0; |
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@ -61,9 +65,15 @@ int z_impl_hwinfo_get_reset_cause(uint32_t *cause)
@@ -61,9 +65,15 @@ int z_impl_hwinfo_get_reset_cause(uint32_t *cause)
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} |
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/* POWER CYCLE */ |
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#if (CONFIG_SOC_SERIES_APOLLO5X) |
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if (reset_status & AM_HAL_RESET_STATUS_POA) { |
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flags |= RESET_POR; |
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} |
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#else |
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if (reset_status & AM_HAL_RESET_STATUS_POR) { |
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flags |= RESET_POR; |
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} |
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#endif |
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/* BROWNOUT DETECTOR */ |
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if (reset_status & AM_HAL_RESET_STATUS_BOD) { |
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@ -110,6 +120,13 @@ int z_impl_hwinfo_get_reset_cause(uint32_t *cause)
@@ -110,6 +120,13 @@ int z_impl_hwinfo_get_reset_cause(uint32_t *cause)
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flags |= RESET_HARDWARE; |
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} |
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#if (CONFIG_SOC_SERIES_APOLLO5X) |
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/* AIRCR */ |
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if (reset_status & AM_HAL_RESET_STATUS_AIRCR) { |
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flags |= RESET_SOFTWARE; |
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} |
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#endif |
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*cause = flags; |
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return 0; |
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} |
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