drivers/fpga: ice40: fix minimum config delay

From FPGA-TN-02001-3.3 "iCE40 Programming and Configuration":

> After driving CRESET_B High or allowing it to float High, the AP must
> wait a minimum of 1200 µs, allowing the iCE40 FPGA to clear its internal
> configuration memory.

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>

drivers/fpga/fpga_ice40.c

@@ -71,7 +71,7 @@
 #define FPGA_ICE40_SPI_HZ_MAX 25000000
 
 #define FPGA_ICE40_CRESET_DELAY_NS_MIN 200
-#define FPGA_ICE40_CONFIG_DELAY_US_MIN 300
+#define FPGA_ICE40_CONFIG_DELAY_US_MIN 1200
 #define FPGA_ICE40_LEADING_CLOCKS_MIN  8
 #define FPGA_ICE40_TRAILING_CLOCKS_MIN 49
 

dts/bindings/fpga/lattice,ice40-fpga.yaml

@@ -84,7 +84,7 @@ properties:
     description: |
       Delay (in microseconds) after releasing CRESET_B to clear internal configuration memory.
       Example usage / default:
-      config-delay-us = <300>;
+      config-delay-us = <1200>;
   leading-clocks:
     type: int
     description: |

tests/drivers/build_all/fpga/spi.dtsi

@@ -16,7 +16,7 @@ test_spi_fpga_ice40_gpio: ice40@0 {
 	load-mode = <0>;
 	cdone-gpios = <&test_gpio 0 0>;
 	creset-gpios = <&test_gpio 0 0>;
-	config-delay-us = <390>;
+	config-delay-us = <3900>;
 };
 
 test_spi_fpga_ice40_spi: ice40@1 {
@@ -33,5 +33,5 @@ test_spi_fpga_ice40_spi: ice40@1 {
 	pico-gpios = <&test_gpio 0 0>;
 	gpios-set-reg = <0>;
 	gpios-clear-reg = <0>;
-	config-delay-us = <390>;
+	config-delay-us = <3900>;
 };