dts: arm: nxp_imx95_m7: add flexspi node

Add flexspi node on imx95 core m7

Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>

boards/nxp/imx95_evk/imx95_evk-pinctrl.dtsi

@@ -42,6 +42,26 @@
 
 	};
 
+	flexspi_default: flexspi_default {
+		group0 {
+			pinmux = <&iomuxc_xspi1_sclk_flexspi_a_sclk_flexspi1_a_sclk>,
+				<&iomuxc_xspi1_ss0_b_flexspi_a_ss_b_flexspi1_a_ss0_b>,
+				<&iomuxc_xspi1_ss1_b_flexspi_a_ss_b_flexspi1_a_ss1_b>,
+				<&iomuxc_xspi1_dqs_flexspi_a_dqs_flexspi1_a_dqs>,
+				<&iomuxc_xspi1_data0_flexspi_a_data_bit_flexspi1_a_data_bit0>,
+				<&iomuxc_xspi1_data1_flexspi_a_data_bit_flexspi1_a_data_bit1>,
+				<&iomuxc_xspi1_data2_flexspi_a_data_bit_flexspi1_a_data_bit2>,
+				<&iomuxc_xspi1_data3_flexspi_a_data_bit_flexspi1_a_data_bit3>,
+				<&iomuxc_xspi1_data4_flexspi_a_data_bit_flexspi1_a_data_bit4>,
+				<&iomuxc_xspi1_data5_flexspi_a_data_bit_flexspi1_a_data_bit5>,
+				<&iomuxc_xspi1_data6_flexspi_a_data_bit_flexspi1_a_data_bit6>,
+				<&iomuxc_xspi1_data7_flexspi_a_data_bit_flexspi1_a_data_bit7>;
+			bias-pull-down;
+			slew-rate = "slightly_fast";
+			drive-strength = "x4";
+		};
+	};
+
 	lpi2c5_default: lpi2c5_default {
 		group0 {
 			pinmux = <&iomuxc_gpio_io23_lpi2c_scl_lpi2c5_scl>,

boards/nxp/imx95_evk/imx95_evk_mimx9596_m7.dts

@@ -44,6 +44,52 @@
 	status = "disabled";
 };
 
+&flexspi {
+	status = "okay";
+	ahb-prefetch;
+	ahb-read-addr-opt;
+	rx-clock-source = <1>;
+	pinctrl-0 = <&flexspi_default>;
+	pinctrl-names = "default";
+	mt35xu01gbba: mt35xu01gbba@0 {
+		compatible = "nxp,imx-flexspi-nor";
+		size = <DT_SIZE_M(1024)>;
+		reg = <0>;
+		spi-max-frequency = <200000000>;
+		status = "okay";
+		jedec-id = [2c 5b 1b];
+		erase-block-size = <4096>;
+		write-block-size = <1>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			/*
+			 * Partition sizes must be aligned
+			 * to the flash memory sector size of 4KB.
+			 */
+			boot_partition: partition@0 {
+				label = "mcuboot";
+				reg = <0x00000000 DT_SIZE_K(128)>;
+			};
+			slot0_partition: partition@20000 {
+				label = "image-0";
+				reg = <0x00020000 DT_SIZE_M(7)>;
+			};
+			slot1_partition: partition@720000 {
+				label = "image-1";
+				reg = <0x00720000 DT_SIZE_M(7)>;
+			};
+			storage_partition: partition@E20000 {
+				label = "storage";
+				reg = <0x00E20000 (DT_SIZE_M(2) - DT_SIZE_K(128))>;
+			};
+		};
+	};
+};
+
 &lpi2c5 {
 	pinctrl-0 = <&lpi2c5_default>;
 	pinctrl-names = "default";

dts/arm/nxp/nxp_imx95_m7.dtsi

@@ -89,6 +89,16 @@
 			reg = <0x20000000 DT_SIZE_K(256)>;
 		};
 
+		flexspi: spi@425e0000 {
+			compatible = "nxp,imx-flexspi";
+			reg = <0x425e0000 0x4000>, <0x28000000 DT_SIZE_M(128)>;
+			interrupts = <48 0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+			clocks = <&scmi_clk IMX95_CLK_FLEXSPI1>;
+		};
+
 		gpio1: gpio@47400000 {
 			compatible = "nxp,imx-rgpio";
 			reg = <0x47400000 DT_SIZE_K(64)>;