From 7cfa5bf6cfe0cf1fee3b38d1ca5b4a48939a82c1 Mon Sep 17 00:00:00 2001 From: Parthiban Veerasooran Date: Mon, 16 Dec 2024 17:02:56 +0530 Subject: [PATCH] drivers: mdio: lan865x: add mdio driver support Implement lan865x mdio driver to provide interface between lan865x MAC driver and internal PHY driver phy_microchip_t1s.c. This driver is needed to support the driver architecture followed. Signed-off-by: Parthiban Veerasooran --- drivers/ethernet/eth_lan865x.c | 33 +++++++ drivers/mdio/CMakeLists.txt | 1 + drivers/mdio/Kconfig | 1 + drivers/mdio/Kconfig.lan865x | 20 ++++ drivers/mdio/mdio_lan865x.c | 79 ++++++++++++++++ dts/bindings/mdio/microchip,lan865x-mdio.yaml | 10 ++ include/zephyr/drivers/ethernet/eth_lan865x.h | 92 +++++++++++++++++++ 7 files changed, 236 insertions(+) create mode 100644 drivers/mdio/Kconfig.lan865x create mode 100644 drivers/mdio/mdio_lan865x.c create mode 100644 dts/bindings/mdio/microchip,lan865x-mdio.yaml create mode 100644 include/zephyr/drivers/ethernet/eth_lan865x.h diff --git a/drivers/ethernet/eth_lan865x.c b/drivers/ethernet/eth_lan865x.c index 04f5cf2de1b..0cda6ce9855 100644 --- a/drivers/ethernet/eth_lan865x.c +++ b/drivers/ethernet/eth_lan865x.c @@ -18,9 +18,42 @@ LOG_MODULE_REGISTER(eth_lan865x, CONFIG_ETHERNET_LOG_LEVEL); #include #include #include +#include #include "eth_lan865x_priv.h" +int eth_lan865x_mdio_c22_read(const struct device *dev, uint8_t prtad, uint8_t regad, + uint16_t *data) +{ + struct lan865x_data *ctx = dev->data; + + return oa_tc6_mdio_read(ctx->tc6, prtad, regad, data); +} + +int eth_lan865x_mdio_c22_write(const struct device *dev, uint8_t prtad, uint8_t regad, + uint16_t data) +{ + struct lan865x_data *ctx = dev->data; + + return oa_tc6_mdio_write(ctx->tc6, prtad, regad, data); +} + +int eth_lan865x_mdio_c45_read(const struct device *dev, uint8_t prtad, uint8_t devad, + uint16_t regad, uint16_t *data) +{ + struct lan865x_data *ctx = dev->data; + + return oa_tc6_mdio_read_c45(ctx->tc6, prtad, devad, regad, data); +} + +int eth_lan865x_mdio_c45_write(const struct device *dev, uint8_t prtad, uint8_t devad, + uint16_t regad, uint16_t data) +{ + struct lan865x_data *ctx = dev->data; + + return oa_tc6_mdio_write_c45(ctx->tc6, prtad, devad, regad, data); +} + static int lan865x_mac_rxtx_control(const struct device *dev, bool en) { struct lan865x_data *ctx = dev->data; diff --git a/drivers/mdio/CMakeLists.txt b/drivers/mdio/CMakeLists.txt index 779ba7ed5ef..6c8c6580872 100644 --- a/drivers/mdio/CMakeLists.txt +++ b/drivers/mdio/CMakeLists.txt @@ -17,3 +17,4 @@ zephyr_library_sources_ifdef(CONFIG_MDIO_INFINEON_XMC4XXX mdio_xmc4xxx.c) zephyr_library_sources_ifdef(CONFIG_MDIO_NXP_ENET_QOS mdio_nxp_enet_qos.c) zephyr_library_sources_ifdef(CONFIG_MDIO_DWCXGMAC mdio_dwcxgmac.c) zephyr_library_sources_ifdef(CONFIG_MDIO_RENESAS_RA mdio_renesas_ra.c) +zephyr_library_sources_ifdef(CONFIG_MDIO_LAN865X mdio_lan865x.c) diff --git a/drivers/mdio/Kconfig b/drivers/mdio/Kconfig index 77dc4d34111..08fef47db9a 100644 --- a/drivers/mdio/Kconfig +++ b/drivers/mdio/Kconfig @@ -38,6 +38,7 @@ source "drivers/mdio/Kconfig.xmc4xxx" source "drivers/mdio/Kconfig.nxp_enet_qos" source "drivers/mdio/Kconfig.dwcxgmac" source "drivers/mdio/Kconfig.renesas_ra" +source "drivers/mdio/Kconfig.lan865x" config MDIO_INIT_PRIORITY int "Init priority" diff --git a/drivers/mdio/Kconfig.lan865x b/drivers/mdio/Kconfig.lan865x new file mode 100644 index 00000000000..8cf7f0c0e83 --- /dev/null +++ b/drivers/mdio/Kconfig.lan865x @@ -0,0 +1,20 @@ +# Copyright 2024 Microchip Technology Inc +# SPDX-License-Identifier: Apache-2.0 + +menuconfig MDIO_LAN865X + bool "LAN865X MDIO driver" + default y + depends on DT_HAS_MICROCHIP_LAN865X_MDIO_ENABLED + depends on ETH_LAN865X + help + Enable LAN865X MDIO driver. + +if MDIO_LAN865X + +config MDIO_LAN865X_INIT_PRIORITY + int "LAN865X MDIO init priority" + default 81 + help + LAN865X MDIO device driver initialization priority. + +endif diff --git a/drivers/mdio/mdio_lan865x.c b/drivers/mdio/mdio_lan865x.c new file mode 100644 index 00000000000..3dfa73f56ff --- /dev/null +++ b/drivers/mdio/mdio_lan865x.c @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2024 Microchip Technology Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +LOG_MODULE_REGISTER(mdio_lan865x, CONFIG_MDIO_LOG_LEVEL); + +#define DT_DRV_COMPAT microchip_lan865x_mdio + +#include +#include +#include +#include +#include +#include + +struct mdio_lan865x_config { + const struct device *dev; +}; + +static void lan865x_mdio_bus_enable(const struct device *dev) +{ + ARG_UNUSED(dev); +} + +static void lan865x_mdio_bus_disable(const struct device *dev) +{ + ARG_UNUSED(dev); +} + +static int lan865x_mdio_c22_read(const struct device *dev, uint8_t prtad, uint8_t regad, + uint16_t *data) +{ + const struct mdio_lan865x_config *const cfg = dev->config; + + return eth_lan865x_mdio_c22_read(cfg->dev, prtad, regad, data); +} + +static int lan865x_mdio_c22_write(const struct device *dev, uint8_t prtad, uint8_t regad, + uint16_t data) +{ + const struct mdio_lan865x_config *const cfg = dev->config; + + return eth_lan865x_mdio_c22_write(cfg->dev, prtad, regad, data); +} + +static int lan865x_mdio_c45_read(const struct device *dev, uint8_t prtad, uint8_t devad, + uint16_t regad, uint16_t *data) +{ + const struct mdio_lan865x_config *const cfg = dev->config; + + return eth_lan865x_mdio_c45_read(cfg->dev, prtad, devad, regad, data); +} + +static int lan865x_mdio_c45_write(const struct device *dev, uint8_t prtad, uint8_t devad, + uint16_t regad, uint16_t data) +{ + const struct mdio_lan865x_config *const cfg = dev->config; + + return eth_lan865x_mdio_c45_write(cfg->dev, prtad, devad, regad, data); +} + +static const struct mdio_driver_api mdio_lan865x_api = {.read = lan865x_mdio_c22_read, + .write = lan865x_mdio_c22_write, + .read_c45 = lan865x_mdio_c45_read, + .write_c45 = lan865x_mdio_c45_write, + .bus_enable = lan865x_mdio_bus_enable, + .bus_disable = lan865x_mdio_bus_disable}; + +#define MICROCHIP_LAN865X_MDIO_INIT(n) \ + static const struct mdio_lan865x_config mdio_lan865x_config_##n = { \ + .dev = DEVICE_DT_GET(DT_INST_PARENT(n)), \ + }; \ + DEVICE_DT_INST_DEFINE(n, NULL, NULL, NULL, &mdio_lan865x_config_##n, POST_KERNEL, \ + CONFIG_MDIO_LAN865X_INIT_PRIORITY, &mdio_lan865x_api); + +DT_INST_FOREACH_STATUS_OKAY(MICROCHIP_LAN865X_MDIO_INIT) diff --git a/dts/bindings/mdio/microchip,lan865x-mdio.yaml b/dts/bindings/mdio/microchip,lan865x-mdio.yaml new file mode 100644 index 00000000000..9940354b1e1 --- /dev/null +++ b/dts/bindings/mdio/microchip,lan865x-mdio.yaml @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Microchip Technology Inc. +# SPDX-License-Identifier: Apache-2.0 + +description: LAN865X MDIO Driver node + +compatible: "microchip,lan865x-mdio" + +include: mdio-controller.yaml + +on-bus: lan865x diff --git a/include/zephyr/drivers/ethernet/eth_lan865x.h b/include/zephyr/drivers/ethernet/eth_lan865x.h new file mode 100644 index 00000000000..4a7e7f11556 --- /dev/null +++ b/include/zephyr/drivers/ethernet/eth_lan865x.h @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2024 Microchip Technology Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_INCLUDE_DRIVERS_ETH_LAN865X_H__ +#define ZEPHYR_INCLUDE_DRIVERS_ETH_LAN865X_H__ + +#include +#include +#include + +/** + * @brief Read C22 registers using LAN865X MDIO Bus + * + * This routine provides an interface to perform a C22 register read on the + * LAN865X MDIO bus. + * + * @param[in] dev Pointer to the device structure for the controller + * @param[in] prtad Port address + * @param[in] regad Register address + * @param data Pointer to receive read data + * + * @retval 0 If successful. + * @retval -EIO General input / output error. + * @retval -ETIMEDOUT If transaction timedout on the bus + * @retval -ENOSYS if read is not supported + */ +int eth_lan865x_mdio_c22_read(const struct device *dev, uint8_t prtad, uint8_t regad, + uint16_t *data); + +/** + * @brief Write C22 registers using LAN865X MDIO Bus + * + * This routine provides an interface to perform a C22 register write on the + * LAN865X MDIO bus. + * + * @param[in] dev Pointer to the device structure for the controller + * @param[in] prtad Port address + * @param[in] regad Register address + * @param[in] data Write data + * + * @retval 0 If successful. + * @retval -EIO General input / output error. + * @retval -ETIMEDOUT If transaction timedout on the bus + * @retval -ENOSYS if read is not supported + */ +int eth_lan865x_mdio_c22_write(const struct device *dev, uint8_t prtad, uint8_t regad, + uint16_t data); + +/** + * @brief Read C45 registers using LAN865X MDIO Bus + * + * This routine provides an interface to perform a C45 register read on the + * LAN865X MDIO bus. + * + * @param[in] dev Pointer to the device structure for the controller + * @param[in] prtad Port address + * @param[in] devad MMD device address + * @param[in] regad Register address + * @param data Pointer to receive read data + * + * @retval 0 If successful. + * @retval -EIO General input / output error. + * @retval -ETIMEDOUT If transaction timedout on the bus + * @retval -ENOSYS if read is not supported + */ +int eth_lan865x_mdio_c45_read(const struct device *dev, uint8_t prtad, uint8_t devad, + uint16_t regad, uint16_t *data); + +/** + * @brief Write C45 registers using LAN865X MDIO Bus + * + * This routine provides an interface to perform a C45 register write on the + * LAN865X MDIO bus. + * + * @param[in] dev Pointer to the device structure for the controller + * @param[in] prtad Port address + * @param[in] devad MMD device address + * @param[in] regad Register address + * @param[in] data Write data + * + * @retval 0 If successful. + * @retval -EIO General input / output error. + * @retval -ETIMEDOUT If transaction timedout on the bus + * @retval -ENOSYS if read is not supported + */ +int eth_lan865x_mdio_c45_write(const struct device *dev, uint8_t prtad, uint8_t devad, + uint16_t regad, uint16_t data); + +#endif /* ZEPHYR_INCLUDE_DRIVERS_ETH_LAN865X_H__ */