driver: clock_control: npcx: don't gate the eSPI clock if eSPI is defined

In the EC application, the system may jump between two built Zephyr
images when necessary. If we gate the eSPI clock at initialzation, it
will make the eSPI configuration which established by previous image
break and lost the communication between EC and host.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>

drivers/clock_control/clock_control_npcx.c

@@ -218,7 +218,12 @@ static int npcx_clock_control_init(const struct device *dev)
 	NPCX_PWDWN_CTL(pmc_base, NPCX_PWDWN_CTL3) = 0x1F; /* No GDMA_PD */
 	NPCX_PWDWN_CTL(pmc_base, NPCX_PWDWN_CTL4) = 0xFF;
 	NPCX_PWDWN_CTL(pmc_base, NPCX_PWDWN_CTL5) = 0xFA;
+#if CONFIG_ESPI
+	/* Don't gate the clock of the eSPI module if eSPI interface is required */
+	NPCX_PWDWN_CTL(pmc_base, NPCX_PWDWN_CTL6) = 0xEF;
+#else
 	NPCX_PWDWN_CTL(pmc_base, NPCX_PWDWN_CTL6) = 0xFF;
+#endif
 #if defined(CONFIG_SOC_SERIES_NPCX7)
 	NPCX_PWDWN_CTL(pmc_base, NPCX_PWDWN_CTL7) = 0xE7;
 #elif defined(CONFIG_SOC_SERIES_NPCX9)