boards: arm: nrf: Adding updated Circuit Dojo board definitions.

Adding the Circuit Dojo nRF9160 Thing Plus device tree definitions.
Both secure and non secure targets.

Adding LIS2DH to nRF9160 Feather
definitions. Updating flash to W25Q32JV.

Signed-off-by: Jared Wolff <hello@jaredwolff.com>

boards/arm/circuitdojo_feather_nrf9160/circuitdojo_feather_nrf9160.dts

@@ -18,3 +18,11 @@
 		zephyr,sram-non-secure-partition = &sram0_ns;
 	};
 };
+
+
+&uart0 {
+	status = "okay";
+	current-speed = <1000000>;
+	tx-pin = <6>;
+	rx-pin = <5>;
+};

boards/arm/circuitdojo_feather_nrf9160/circuitdojo_feather_nrf9160_common.dts

@@ -41,6 +41,7 @@
 	/* These aliases are provided for compatibility with samples */
 	aliases {
 		led0 = &blue_led;
+		bootloader-led0 = &blue_led;
 		pwm-led0 = &pwm_led0;
 		sw0 = &button0;
 	};
@@ -112,9 +113,16 @@
 	scl-pin = <27>;
 
 	pcf85063a@51 {
-			compatible = "nxp,pcf85063a";
-			label = "PCF85063A";
-			reg = <0x51>;
+		compatible = "nxp,pcf85063a";
+		label = "PCF85063A";
+		reg = <0x51>;
+	};
+
+	lis2dh@18 {
+		compatible = "st,lis2dh";
+		label = "LIS2DH";
+		reg = <0x18>;
+		irq-gpios = <&gpio0 29 0>;
 	};
 
 };
@@ -127,22 +135,22 @@
 &spi3 {
 	compatible = "nordic,nrf-spim";
 	status = "okay";
-	sck-pin = <11>;
-	mosi-pin = <9>;
-	miso-pin = <28>;
-	cs-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
-	w25q16jv: w25q16jv@0 {
+	sck-pin = < 11 >;
+	mosi-pin = < 9 >;
+	miso-pin = < 28 >;
+	cs-gpios = < &gpio0 7 GPIO_ACTIVE_LOW >;
+	w25q32jv: w25q32jv@0 {
 		compatible = "jedec,spi-nor";
-		label = "W25Q16JV";
-		reg = <0>;
-		spi-max-frequency = <40000000>;
-		wp-gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
-		hold-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
-		size = <0x1000000>;
+		label = "W25Q32JV";
+		reg = < 0 >;
+		spi-max-frequency = < 40000000 >;
+		wp-gpios = < &gpio0 8 GPIO_ACTIVE_LOW >;
+		hold-gpios = < &gpio0 10 GPIO_ACTIVE_LOW >;
+		size = < 0x2000000 >;
 		has-dpd;
-		t-enter-dpd = <4000>;
-		t-exit-dpd = <25000>;
-		jedec-id = [ef 40 15];
+		t-enter-dpd = < 3000 >;
+		t-exit-dpd = < 30000 >;
+		jedec-id = [ ef 40 16  ];
 	};
 };
 

boards/arm/circuitdojo_feather_nrf9160/circuitdojo_feather_nrf9160_defconfig

@@ -10,6 +10,9 @@ CONFIG_ARM_MPU=y
 # Enable TrustZone-M
 CONFIG_ARM_TRUSTZONE_M=y
 
+# Hardware stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
 # enable GPIO
 CONFIG_GPIO=y
 

boards/arm/circuitdojo_feather_nrf9160/circuitdojo_feather_nrf9160ns_defconfig

@@ -13,6 +13,9 @@ CONFIG_ARM_TRUSTZONE_M=y
 # This Board implies building Non-Secure firmware
 CONFIG_TRUSTED_EXECUTION_NONSECURE=y
 
+# Hardware stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
 # enable GPIO
 CONFIG_GPIO=y
 

boards/arm/sparkfun_thing_plus_nrf9160/CMakeLists.txt

@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_library()
+zephyr_library_sources(board.c)

boards/arm/sparkfun_thing_plus_nrf9160/Kconfig

@@ -0,0 +1,5 @@
+# Circuit Dojo nRF9160 Feather configuration
+
+# Copyright (c) 2018-2020 Nordic Semiconductor ASA
+# Copyright (c) 2020 Circuit Dojo LLC
+# SPDX-License-Identifier: Apache-2.0

boards/arm/sparkfun_thing_plus_nrf9160/Kconfig.board

@@ -0,0 +1,15 @@
+# Sparkfun nRF9160 Thing Plus configuration
+
+# Copyright (c) 2018-2020 Nordic Semiconductor ASA
+# Copyright (c) 2020 Circuit Dojo LLC
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_NRF9160_SICA
+
+config BOARD_SPARKFUN_THING_PLUS_NRF9160
+	bool "Sparkfun nRF9160 Thing Plus"
+
+config BOARD_SPARKFUN_THING_PLUS_NRF9160NS
+	bool "Sparkfun nRF9160 Thing Plus non-secure"
+
+endif # SOC_NRF9160_SICA

boards/arm/sparkfun_thing_plus_nrf9160/Kconfig.defconfig

@@ -0,0 +1,39 @@
+# Circuit Dojo nRF9160 Feather configuration
+
+# Copyright (c) 2018-2020 Nordic Semiconductor ASA
+# Copyright (c) 2020 Circuit Dojo LLC
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_SPARKFUN_THING_PLUS_NRF9160 || BOARD_SPARKFUN_THING_PLUS_NRF9160NS
+
+config BOARD
+	default "sparkfun_thing_plus_nrf9160"
+
+# For the secure version of the board the firmware is linked at the beginning
+# of the flash, or into the code-partition defined in DT if it is intended to
+# be loaded by MCUboot. If the secure firmware is to be combined with a non-
+# secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
+# be restricted to the size of its code partition.
+# For the non-secure version of the board, the firmware
+# must be linked into the code-partition (non-secure) defined in DT, regardless.
+# Apply this configuration below by setting the Kconfig symbols used by
+# the linker according to the information extracted from DT partitions.
+
+# Workaround for not being able to have commas in macro arguments
+DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
+
+config FLASH_LOAD_SIZE
+	default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
+	depends on BOARD_SPARKFUN_THING_PLUS_NRF9160 && TRUSTED_EXECUTION_SECURE
+
+if BOARD_SPARKFUN_THING_PLUS_NRF9160NS
+
+config FLASH_LOAD_OFFSET
+	default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
+
+config FLASH_LOAD_SIZE
+	default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
+
+endif # BOARD_SPARKFUN_THING_PLUS_NRF9160NS
+
+endif # BOARD_SPARKFUN_THING_PLUS_NRF9160 || BOARD_SPARKFUN_THING_PLUS_NRF9160NS

boards/arm/sparkfun_thing_plus_nrf9160/board.c

@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2020 Circuit Dojo LLC
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <init.h>
+#include <drivers/gpio.h>
+
+#define GPIO0 DT_LABEL(DT_NODELABEL(gpio0))
+#define POWER_LATCH_PIN 31
+
+static int board_sparkfun_thing_plus_nrf9160_init(const struct device *dev)
+{
+	ARG_UNUSED(dev);
+
+	/* Get the device binding */
+	const struct device *gpio = device_get_binding(GPIO0);
+
+	/* Return if NULL */
+	if (gpio == NULL) {
+		return -ENODEV;
+	}
+
+	/* Configure latch pin as output. */
+	gpio_pin_configure(gpio, POWER_LATCH_PIN, GPIO_OUTPUT_HIGH);
+
+	return 0;
+}
+
+/* needs to be done after GPIO driver init */
+SYS_INIT(board_sparkfun_thing_plus_nrf9160_init, POST_KERNEL,
+	 CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);

boards/arm/sparkfun_thing_plus_nrf9160/board.cmake

@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(nrfjprog "--nrf-family=NRF91")
+board_runner_args(jlink "--device=cortex-m33" "--speed=4000")
+include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/arm/sparkfun_thing_plus_nrf9160/doc/index.rst

@@ -0,0 +1,153 @@
+.. _sparkfun_thing_plus_nrf9160:
+
+nRF9160 Thing Plus
+##################
+
+.. figure:: img/sparkfun_thing_plus_nrf9160.jpeg
+     :width: 600px
+     :align: center
+     :alt: Sparkfun nRF9160 Thing Plus
+
+     nRF9160 Thing Plus (Credit: Sparkfun)
+
+Overview
+********
+
+The nRF9160 Thing Plus designed by Circuit Dojo is a single-board development
+for bringing your LTE-M and NB-IoT applications to life. The sparkfun_thing_plus_nrf9160
+board configuration leverages the pre-existing support for the Nordic Semiconductor
+nRF9160. Supported nRF9160 peripherals include:
+
+* :abbr:`ADC (Analog to Digital Converter)`
+* CLOCK
+* FLASH
+* :abbr:`GPIO (General Purpose Input Output)`
+* :abbr:`I2C (Inter-Integrated Circuit)`
+* :abbr:`MPU (Memory Protection Unit)`
+* :abbr:`NVIC (Nested Vectored Interrupt Controller)`
+* :abbr:`PWM (Pulse Width Modulation)`
+* :abbr:`RTC (nRF RTC System Clock)`
+* Segger RTT (RTT Console)
+* :abbr:`SPI (Serial Peripheral Interface)`
+* :abbr:`UARTE (Universal asynchronous receiver-transmitter with EasyDMA)`
+* :abbr:`WDT (Watchdog Timer)`
+* :abbr:`IDAU (Implementation Defined Attribution Unit)`
+
+More information about the board can be found at the
+`nRF9160 Thing Plus Documentation`_.
+
+
+Hardware
+********
+
+Connections and IOs
+===================
+
+The nRF9160 Thing Plus has everything you know and love about
+the Feather platform. Here are some of the highlights:
+
+LED
+---
+
+* D7 (blue) = P0.03
+
+Push buttons and Switches
+-------------------------
+
+* MODE = P0.12
+* RESET
+
+USB
+---
+
+Contains a USB/UART connection for both debugging and loading new
+code using a UART Enabled MCUBoot.
+
+Standard Battery Connection
+----------------------------
+
+The nRF9160 Thing Plus has a 2 pin battery connector on board. Lithium Polymer batteries >
+300mA required.
+
+Nano SIM Holder
+---------------
+
+The nRF9160 Thing Plus has a built-in nano SIM (4FF) holder located
+on the bottom side.
+
+
+Programming and Debugging
+*************************
+
+sparkfun_thing_plus_nrf9160 can be used with most programmers like:
+
+* J-Link (the nRF53-DK is recommended)
+* CMSIS-DAP based programmers
+
+Check out `Getting Started`_ for more info.
+
+Building an application
+=======================
+
+In most cases you'll want to use the ``ns`` target with any of the Zephyr
+or Nordic based examples. Some of the examples do not use secure mode,
+so they do not required the ``ns`` suffix. A great example of this is the
+`hello_world` below:
+
+Flashing
+========
+
+Follow the instructions in the :ref:`nordic_segger` page to install
+and configure all the necessary software. Further information can be
+found in :ref:`nordic_segger_flashing`. Then build and flash
+applications as usual (see :ref:`build_an_application` and
+:ref:`application_run` for more details).
+
+Here is an example for the :ref:`hello_world` application.
+
+First, run your favorite terminal program to listen for output.
+
+.. code-block:: console
+
+   $ screen /dev/<tty_device> 115200
+
+Replace :code:`<tty_device>` with the port where the nRF9160 Thing Plus
+can be found. In most cases (On Linux/Mac) it will be: :code:`/dev/tty.SLAB_USBtoUART`.
+
+Then build and flash the application in the usual way.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: sparkfun_thing_plus_nrf9160
+   :goals: build flash
+
+Debugging
+=========
+
+Refer to the :ref:`nordic_segger` page to learn about debugging Nordic boards with a
+Segger IC.
+
+
+Testing the LEDs and buttons on the nRF9160 Thing Plus
+******************************************************
+
+There are 2 samples that allow you to test that the buttons (switches) and LEDs on
+the board are working properly with Zephyr:
+
+* :ref:`blinky-sample`
+* :ref:`button-sample`
+
+You can build and flash the examples to make sure Zephyr is running correctly on
+your board. The button and LED definitions can be found in
+:zephyr_file:`boards/arm/sparkfun_thing_plus_nrf9160/sparkfun_thing_plus_nrf9160_common.dts`.
+
+References
+**********
+
+.. target-notes::
+
+**Side note** This page was based on the documentation for the nRF9160 DK. Thanks to Nordic for
+developing a great platform!
+
+.. _nRF9160 Thing Plus Documentation: https://docs.jaredwolff.com/nrf9160-introduction.html
+.. _Getting Started: https://docs.jaredwolff.com/nrf9160-getting-started.html

boards/arm/sparkfun_thing_plus_nrf9160/sparkfun_thing_plus_nrf9160.dts

@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2018-2020 Nordic Semiconductor ASA
+ * Copyright (c) 2020 Circuit Dojo LLC
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <nordic/nrf9160_sica.dtsi>
+#include "sparkfun_thing_plus_nrf9160_common.dts"
+
+/ {
+	chosen {
+		zephyr,sram = &sram0_s;
+		zephyr,flash = &flash0;
+		zephyr,code-partition = &slot0_partition;
+		zephyr,sram-secure-partition = &sram0_s;
+		zephyr,sram-non-secure-partition = &sram0_ns;
+	};
+};
+
+&uart0 {
+	status = "okay";
+	current-speed = <1000000>;
+	tx-pin = <6>;
+	rx-pin = <5>;
+};

boards/arm/sparkfun_thing_plus_nrf9160/sparkfun_thing_plus_nrf9160.yaml

@@ -0,0 +1,15 @@
+identifier: sparkfun_thing_plus_nrf9160
+name: Sparkfun-Thing-Plus-nRF9160
+type: mcu
+arch: arm
+toolchain:
+  - gnuarmemb
+  - xtools
+  - zephyr
+ram: 64
+flash: 256
+supported:
+  - i2c
+  - pwm
+  - watchdog
+  - counter

boards/arm/sparkfun_thing_plus_nrf9160/sparkfun_thing_plus_nrf9160_common.dts

@@ -0,0 +1,234 @@
+/*
+ * Copyright (c) 2018-2020 Nordic Semiconductor ASA
+ * Copyright (c) 2020 Circuit Dojo LLC
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	model = "Sparkfun nRF9160 Thing Plus";
+	compatible = "sparkfun,thing-plus-nrf9160";
+
+	chosen {
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,uart-mcumgr = &uart0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		blue_led: led_0 {
+			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+			label = "Blue LED (D7)";
+		};
+	};
+
+	pwmleds {
+		compatible = "pwm-leds";
+		pwm_led0: pwm_led_0 {
+			pwms = <&pwm0 3>;
+		};
+	};
+
+	buttons {
+		compatible = "gpio-keys";
+		button0: button_0 {
+			gpios = <&gpio0 12 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+			label = "Switch 1";
+		};
+	};
+
+	/* These aliases are provided for compatibility with samples */
+	aliases {
+		led0 = &blue_led;
+		bootloader-led0 = &blue_led;
+		pwm-led0 = &pwm_led0;
+		sw0 = &button0;
+	};
+
+	/* Used for accessing other pins */
+	feather_header: feather_connector {
+		compatible = "adafruit-feather-header";
+		#gpio-cells = <2>;
+		gpio-map-mask = <0xffffffff 0xffffffc0>;
+		gpio-map-pass-thru = <0 0x3f>;
+		gpio-map = <12 0 &gpio0 26 0>,  /* SDA */
+		<13 0 &gpio0 27 0>,  /* SCL */
+		<14 0 &gpio0 29 0>,  /* PWM3 */
+		<15 0 &gpio0 30 0>,  /* PWM3 */
+		<16 0 &gpio0 0 0>,   /* PWM1 */
+		<17 0 &gpio0 1 0>,   /* PWM1 */
+		<18 0 &gpio0 2 0>,   /* PWM1 */
+		<19 0 &gpio0 3 0>,   /* PWM0 */
+		<20 0 &gpio0 4 0>,   /* PWM1 */
+		/* 11 not connected */
+		<10 0 &gpio0 24 0>,  /* TX */
+		<9 0 &gpio0 23 0>,   /* RX */
+		<8 0 &gpio0 22 0>,   /* MISO */
+		<7 0 &gpio0 21 0>,   /* MOSI */
+		<6 0 &gpio0 19 0>,   /* SCK */
+		<5 0 &gpio0 18 0>,   /* SS */
+		<4 0 &gpio0 17 0>,   /* ADC4 = AIN6 */
+		<3 0 &gpio0 16 0>,   /* ADC3 = AIN5 */
+		<2 0 &gpio0 15 0>,   /* ADC2 = AIN4 */
+		<1 0 &gpio0 14 0>,   /* ADC1 = AIN2 */
+		<0 0 &gpio0 13 0>;   /* ADC0 = AIN1 */
+	};
+};
+
+&adc {
+	status = "okay";
+};
+
+&gpiote {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+	current-speed = <115200>;
+	tx-pin = <6>;
+	rx-pin = <5>;
+};
+
+&uart1 {
+	current-speed = <115200>;
+	tx-pin = <0>;
+	rx-pin = <1>;
+};
+
+&uart2 {
+	tx-pin = <24>;
+	rx-pin = <23>;
+};
+
+&i2c1 {
+	compatible = "nordic,nrf-twim";
+	status = "okay";
+	sda-pin = <26>;
+	scl-pin = <27>;
+
+	pcf85063a@51 {
+		compatible = "nxp,pcf85063a";
+		label = "PCF85063A";
+		reg = <0x51>;
+	};
+
+	lis2dh@18 {
+		compatible = "st,lis2dh";
+		label = "LIS2DH";
+		reg = <0x18>;
+		irq-gpios = <&gpio0 29 0>;
+	};
+
+};
+
+&pwm0 {
+	status = "okay";
+	ch0-pin = <3>;
+};
+
+&spi3 {
+	compatible = "nordic,nrf-spim";
+	status = "okay";
+	sck-pin = <11>;
+	mosi-pin = <9>;
+	miso-pin = <28>;
+	cs-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+	w25q32jv: w25q32jv@0 {
+		compatible = "jedec,spi-nor";
+		label = "W25Q32JV";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+		wp-gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
+		hold-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+		size = <0x2000000>;
+		has-dpd;
+		t-enter-dpd = <3000>;
+		t-exit-dpd = <30000>;
+		jedec-id = [ ef 40 16 ];
+	};
+};
+
+&timer0 {
+	status = "okay";
+};
+
+&timer1 {
+	status = "okay";
+};
+
+&timer2 {
+	status = "okay";
+};
+
+&flash0 {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		boot_partition: partition@0 {
+			label = "mcuboot";
+			reg = <0x00000000 0x10000>;
+		};
+		slot0_partition: partition@10000 {
+			label = "image-0";
+		};
+		slot0_ns_partition: partition@40000 {
+			label = "image-0-nonsecure";
+		};
+		slot1_partition: partition@80000 {
+			label = "image-1";
+		};
+		slot1_ns_partition: partition@b0000 {
+			label = "image-1-nonsecure";
+		};
+		scratch_partition: partition@f0000 {
+			label = "image-scratch";
+			reg = <0x000f0000 0xa000>;
+		};
+		storage_partition: partition@fa000 {
+			label = "storage";
+			reg = <0x000fa000 0x00006000>;
+		};
+	};
+};
+
+/ {
+
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		sram0_s: image_s@20000000 {
+			/* Secure image memory */
+		};
+
+		sram0_bsd: image_bsd@20010000 {
+			/* BSD (shared) memory */
+		};
+
+		sram0_ns: image_ns@20020000 {
+			/* Non-Secure image memory */
+		};
+	};
+};
+
+/ {
+	vbatt {
+		compatible = "voltage-divider";
+		io-channels = <&adc 7>;
+		output-ohms = <100000>;
+		full-ohms = <(100000 + 100000)>;
+		power-gpios = <&gpio0 25 0>;
+	};
+};
+
+/* Include partition configuration file */
+#include "sparkfun_thing_plus_nrf9160_partition_conf.dts"

boards/arm/sparkfun_thing_plus_nrf9160/sparkfun_thing_plus_nrf9160_defconfig

@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_SERIES_NRF91X=y
+CONFIG_SOC_NRF9160_SICA=y
+CONFIG_BOARD_SPARKFUN_THING_PLUS_NRF9160=y
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable TrustZone-M
+CONFIG_ARM_TRUSTZONE_M=y
+
+# Hardware stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# enable GPIO
+CONFIG_GPIO=y
+
+# Enable uart driver
+CONFIG_SERIAL=y
+
+# enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y

boards/arm/sparkfun_thing_plus_nrf9160/sparkfun_thing_plus_nrf9160_partition_conf.dts

@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2018-2020 Nordic Semiconductor ASA
+ * Copyright (c) 2020 Circuit Dojo LLC
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*
+ * Default Flash planning for sparkfun_thing_plus_nrf9160.
+ *
+ * Zephyr build for nRF9160 with ARM TrustZone-M support,
+ * implies building Secure and Non-Secure Zephyr images.
+ *
+ * Secure image will be placed, by default, in flash0
+ * (or in slot0, if MCUboot is present).
+ * Secure image will use sram0 for system memory.
+ *
+ * Non-Secure image will be placed in slot0_ns, and use
+ * sram0_ns for system memory.
+ *
+ * Note that the Secure image only requires knowledge of
+ * the beginning of the Non-Secure image (not its size).
+ */
+
+&slot0_partition {
+	 reg = <0x00010000 0x30000>;
+};
+
+&slot0_ns_partition {
+	reg = <0x00040000 0x40000>;
+};
+
+&slot1_partition {
+	reg = <0x00080000 0x30000>;
+};
+
+&slot1_ns_partition {
+	reg = <0x000b0000 0x40000>;
+};
+
+/* Default SRAM planning when building for nRF9160 with
+ * ARM TrustZone-M support
+ * - Lowest 64 kB SRAM allocated to Secure image (sram0_s).
+ * - 64 kB SRAM reserved for and used by the BSD socket
+ *   library (sram0_bsd).
+ * - Upper 128 kB allocated to Non-Secure image (sram0_ns).
+ */
+
+&sram0_s {
+	reg = <0x20000000 DT_SIZE_K(64)>;
+};
+
+&sram0_bsd {
+	reg = <0x20010000 DT_SIZE_K(64)>;
+};
+
+&sram0_ns {
+	reg = <0x20020000 DT_SIZE_K(128)>;
+};

boards/arm/sparkfun_thing_plus_nrf9160/sparkfun_thing_plus_nrf9160ns.dts

@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2018-2020 Nordic Semiconductor ASA
+ * Copyright (c) 2020 Circuit Dojo LLC
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <nordic/nrf9160ns_sica.dtsi>
+#include "sparkfun_thing_plus_nrf9160_common.dts"
+
+/ {
+	chosen {
+		zephyr,flash = &flash0;
+		zephyr,sram = &sram0_ns;
+		zephyr,code-partition = &slot0_ns_partition;
+	};
+};

boards/arm/sparkfun_thing_plus_nrf9160/sparkfun_thing_plus_nrf9160ns.yaml

@@ -0,0 +1,14 @@
+identifier: sparkfun_thing_plus_nrf9160ns
+name: Sparkfun-Thing-Plus-nRF9160-Non-Secure
+type: mcu
+arch: arm
+toolchain:
+  - gnuarmemb
+  - xtools
+  - zephyr
+ram: 128
+flash: 256
+supported:
+  - i2c
+  - pwm
+  - watchdog

boards/arm/sparkfun_thing_plus_nrf9160/sparkfun_thing_plus_nrf9160ns_defconfig

@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_SERIES_NRF91X=y
+CONFIG_SOC_NRF9160_SICA=y
+CONFIG_BOARD_SPARKFUN_THING_PLUS_NRF9160NS=y
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable TrustZone-M
+CONFIG_ARM_TRUSTZONE_M=y
+
+# This Board implies building Non-Secure firmware
+CONFIG_TRUSTED_EXECUTION_NONSECURE=y
+
+# Hardware stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# enable GPIO
+CONFIG_GPIO=y
+
+# Enable uart driver
+CONFIG_SERIAL=y
+
+# enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y