soc: arc: snps_arc_iot: define sysconf in DT

sysconf base address was hardcoded in <soc.h>. Create a new compatible
and define it in Devicetree, where hardware needs to be described.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

dts/arc/synopsys/arc_iot.dtsi

@@ -33,6 +33,11 @@
 		interrupt-parent = <&intc>;
 	};
 
+	sysconf: system-configuration@f000a000 {
+		compatible = "snps,arc-iot-sysconf";
+		reg = <0xf000a000 0x90>;
+	};
+
 	iccm0: iccm@20000000 {
 		compatible = "arc,iccm";
 		reg = <0x20000000 0x40000>;

dts/bindings/misc/snps,arc-iot-sysconf.yaml

@@ -0,0 +1,12 @@
+# Copyright (c) 2022 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+description: ARC IoT SoC System Configuration Module
+
+compatible: "snps,arc-iot-sysconf"
+
+include: base.yaml
+
+properties:
+    reg:
+      required: true

soc/arc/snps_arc_iot/soc.h

@@ -16,8 +16,6 @@
 
 #include <zephyr/sys/util.h>
 
-#define BASE_ADDR_SYSCONFIG		0xF000A000
-
 #ifndef _ASMLANGUAGE
 
 

soc/arc/snps_arc_iot/sysconf.c

@@ -4,7 +4,7 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include "soc.h"
+#include <zephyr/devicetree.h>
 #include "sysconf.h"
 
 /* default system clock */
@@ -13,7 +13,7 @@
 #define PLL_CLK_IN	(SYSCLK_DEFAULT_IOSC_HZ / 1000000)  /* PLL clock in */
 
 
-#define sysconf_reg_ptr ((sysconf_reg_t *)(BASE_ADDR_SYSCONFIG))
+#define sysconf_reg_ptr ((sysconf_reg_t *)(DT_REG_ADDR(DT_NODELABEL(sysconf))))
 
 
 typedef struct pll_conf {