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ti: j722s: Fix reg length in pinctrl as per TRM description

In j722s_main.dtsi, the pinctrl block must have reg length 0x2b0
As per TRM, PADCONFIG registers range from 0 to 171.
Thus, length = (171-0+1)*4 = 172*4 = 0x2b0.

Reference: https://www.ti.com/lit/ds/symlink/tda4ven-q1.pdf
Table 5.1 contains data on PADCONFIG registers.

Signed-off-by: Shreyas Shankar <s-shankar@ti.com>
pull/89646/merge
Shreyas Shankar 1 month ago committed by Benjamin Cabé
parent
commit
73e6ca23eb
  1. 2
      dts/arm/ti/j722s_main.dtsi

2
dts/arm/ti/j722s_main.dtsi

@ -15,7 +15,7 @@ @@ -15,7 +15,7 @@
pinctrl: pinctrl@f4000 {
compatible = "ti,k3-pinctrl";
reg = <0x000f4000 0x2ac>;
reg = <0x000f4000 0x2b0>;
status = "okay";
};

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