drivers: mspi_dw: Add waiting for clock in nRF EXMIF specific resume

After the START task is triggered, the clock that drives the SSI core
needs some time to become ready. Before that, writes to SSI registers
may be unsuccessful. Add a loop that performs test writes to one of
the registers after the EXMIF peripheral is resumed to ensure that it
is fully operable.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>

drivers/mspi/mspi_dw.c

@@ -16,7 +16,6 @@
 #include <zephyr/sys/util.h>
 
 #include "mspi_dw.h"
-#include "mspi_dw_vendor_specific.h"
 
 LOG_MODULE_REGISTER(mspi_dw, CONFIG_MSPI_LOG_LEVEL);
 
@@ -116,6 +115,8 @@ DEFINE_MM_REG_WR(xip_write_wrap_inst,	0x144)
 DEFINE_MM_REG_WR(xip_write_ctrl,	0x148)
 #endif
 
+#include "mspi_dw_vendor_specific.h"
+
 static void tx_data(const struct device *dev,
 		    const struct mspi_xfer_packet *packet)
 {

drivers/mspi/mspi_dw_vendor_specific.h

@@ -33,6 +33,17 @@ static inline void vendor_specific_resume(const struct device *dev)
 	ARG_UNUSED(dev);
 
 	NRF_EXMIF->TASKS_START = 1;
+
+	/* Try to write an SSI register and wait until the write is successful
+	 * to ensure that the clock that drives the SSI core is ready.
+	 */
+	uint32_t rxftlr = read_rxftlr(dev);
+	uint32_t rxftlr_mod = rxftlr ^ 1;
+
+	do {
+		write_rxftlr(dev, rxftlr_mod);
+		rxftlr = read_rxftlr(dev);
+	} while (rxftlr != rxftlr_mod);
 }
 
 static inline void vendor_specific_irq_clear(const struct device *dev)