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Added a driver for the External Watchdog Driver Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>pull/89658/head
6 changed files with 240 additions and 0 deletions
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# Copyright 2025 NXP |
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# SPDX-License-Identifier: Apache-2.0 |
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config WDT_NXP_EWM |
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bool "NXP EWM driver" |
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default y |
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depends on DT_HAS_NXP_EWM_ENABLED |
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help |
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Enable the nxp ewm driver. |
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/*
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* Copyright 2025 NXP |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT nxp_ewm |
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#include <zephyr/drivers/watchdog.h> |
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#include <zephyr/irq.h> |
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#include <zephyr/logging/log.h> |
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LOG_MODULE_REGISTER(wdt_nxp_ewm); |
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#define NXP_EWM_FEED_MAGIC_NUMBER 0x2CB4 |
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#define NXP_EWM_MAX_TIMEOUT_WINDOW 0xFE |
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struct nxp_ewm_config { |
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EWM_Type *base; |
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void (*irq_config_func)(const struct device *dev); |
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bool is_input_enabled; |
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bool is_input_active_high; |
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uint8_t clk_divider; |
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}; |
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struct nxp_ewm_data { |
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struct wdt_timeout_cfg timeout_cfg; |
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bool is_watchdog_setup; |
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}; |
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static int nxp_ewm_setup(const struct device *dev, uint8_t options) |
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{ |
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const struct nxp_ewm_config *config = dev->config; |
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struct nxp_ewm_data *data = dev->data; |
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EWM_Type *base = config->base; |
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if (data->is_watchdog_setup) { |
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/* Watchdog cannot be re-configured after enabled. */ |
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return -EBUSY; |
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} |
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if (options) { |
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/* Unable to halt counter during debugging */ |
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return -ENOTSUP; |
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} |
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data->is_watchdog_setup = true; |
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base->CMPL = EWM_CMPL_COMPAREL(data->timeout_cfg.window.min); |
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base->CMPH = EWM_CMPH_COMPAREH(data->timeout_cfg.window.max); |
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/*
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* base->CTRL should be the last thing touched due to |
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* the small watchdog window time. |
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* After this write, only the INTEN bit is writable until reset. |
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* |
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* EWM_CTRL_INTEN enables the interrupt signal |
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* EWM_CTRL_EWMEN enables the watchdog. |
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*/ |
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base->CTRL |= EWM_CTRL_INEN(config->is_input_enabled) | |
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EWM_CTRL_ASSIN(config->is_input_active_high) | |
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EWM_CTRL_INTEN(1) | EWM_CTRL_EWMEN(1); |
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return 0; |
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} |
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static int nxp_ewm_disable(const struct device *dev) |
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{ |
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struct nxp_ewm_data *data = dev->data; |
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if (!data->is_watchdog_setup) { |
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return -EFAULT; |
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} |
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return -EPERM; |
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} |
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static int nxp_ewm_install_timeout(const struct device *dev, |
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const struct wdt_timeout_cfg *cfg) |
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{ |
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struct nxp_ewm_data *data = dev->data; |
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if (cfg->flags) { |
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return -ENOTSUP; |
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} |
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if (data->is_watchdog_setup) { |
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return -ENOMEM; |
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} |
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if (cfg && cfg->window.max <= NXP_EWM_MAX_TIMEOUT_WINDOW && |
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cfg->window.min <= cfg->window.max && |
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cfg->window.max > 0 && |
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cfg->window.min >= 0) { |
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data->timeout_cfg.window = cfg->window; |
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} else { |
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return -EINVAL; |
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} |
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#if defined(CONFIG_WDT_MULTISTAGE) |
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if (cfg->next) { |
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return -EINVAL; |
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} |
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#endif |
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if (cfg->callback) { |
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data->timeout_cfg.callback = cfg->callback; |
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} |
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return 0; |
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} |
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static int nxp_ewm_feed(const struct device *dev, int channel_id) |
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{ |
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ARG_UNUSED(channel_id); |
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const struct nxp_ewm_config *config = dev->config; |
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EWM_Type *base = config->base; |
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unsigned int key = irq_lock(); |
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base->SERV = EWM_SERV_SERVICE(NXP_EWM_FEED_MAGIC_NUMBER); |
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base->SERV = EWM_SERV_SERVICE((uint8_t)(NXP_EWM_FEED_MAGIC_NUMBER >> 8)); |
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irq_unlock(key); |
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return 0; |
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} |
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static void nxp_ewm_isr(const struct device *dev) |
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{ |
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const struct nxp_ewm_config *config = dev->config; |
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struct nxp_ewm_data *data = dev->data; |
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EWM_Type *base = config->base; |
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base->CTRL &= (~EWM_CTRL_INTEN_MASK); |
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if (data->timeout_cfg.callback) { |
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data->timeout_cfg.callback(dev, 0); |
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} |
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} |
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static int nxp_ewm_init(const struct device *dev) |
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{ |
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const struct nxp_ewm_config *config = dev->config; |
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EWM_Type *base = config->base; |
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if (config->clk_divider >= 0 && config->clk_divider <= 0xFF) { |
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base->CLKPRESCALER = EWM_CLKPRESCALER_CLK_DIV(config->clk_divider); |
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} |
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config->irq_config_func(dev); |
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return 0; |
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} |
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static DEVICE_API(wdt, nxp_ewm_api) = { |
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.setup = nxp_ewm_setup, |
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.disable = nxp_ewm_disable, |
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.install_timeout = nxp_ewm_install_timeout, |
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.feed = nxp_ewm_feed, |
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}; |
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#define WDT_EWM_INIT(n) \ |
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static void nxp_ewm_config_func_##n(const struct device *dev); \ |
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\ |
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static const struct nxp_ewm_config nxp_ewm_config_##n = { \ |
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.base = (EWM_Type *)DT_INST_REG_ADDR(n), \ |
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.irq_config_func = nxp_ewm_config_func_##n, \ |
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.is_input_enabled = DT_INST_PROP(n, input_trigger_en), \ |
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.is_input_active_high = \ |
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DT_INST_PROP(n, input_trigger_active_high), \ |
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.clk_divider = DT_INST_PROP(n, clk_divider), \ |
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}; \ |
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\ |
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static struct nxp_ewm_data nxp_ewm_data_##n; \ |
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\ |
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DEVICE_DT_INST_DEFINE(n, \ |
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nxp_ewm_init, \ |
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NULL, \ |
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&nxp_ewm_data_##n, &nxp_ewm_config_##n, \ |
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POST_KERNEL, \ |
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \ |
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&nxp_ewm_api); \ |
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\ |
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static void nxp_ewm_config_func_##n(const struct device *dev) \ |
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{ \ |
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ARG_UNUSED(dev); \ |
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\ |
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IRQ_CONNECT(DT_INST_IRQN(n), \ |
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DT_INST_IRQ(n, priority), \ |
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nxp_ewm_isr, DEVICE_DT_INST_GET(n), 0); \ |
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\ |
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irq_enable(DT_INST_IRQN(n)); \ |
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} |
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DT_INST_FOREACH_STATUS_OKAY(WDT_EWM_INIT) |
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# Copyright 2025 NXP |
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# SPDX-License-Identifier: Apache-2.0 |
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description: NXP External Watchdog Monitor |
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compatible: "nxp,ewm" |
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include: base.yaml |
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properties: |
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reg: |
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required: true |
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interrupts: |
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required: true |
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clk-divider: |
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type: int |
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description: Watchdog clock divider |
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required: true |
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input_trigger_en: |
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type: boolean |
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description: | |
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When enabled the ewm_in signal can be used |
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to assert the ewm. |
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input_trigger_active_high: |
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type: boolean |
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description: | |
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When enabled the ewm_in signal is active high. |
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The ewm_in signal is active low otherwise. |
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