From 5b7d1e4129fb923a9c266d2462071ef5d8b9948f Mon Sep 17 00:00:00 2001 From: Samuel Chee Date: Wed, 5 Feb 2025 13:55:47 +0000 Subject: [PATCH] boards: arm: mps2: add pinctrl support for mps2 board Migrates mps2 targets away from the pinmux driver to the new pinctrl driver. Signed-off-by: Samuel Chee Signed-off-by: Sudan Landge --- boards/arm/mps2/CMakeLists.txt | 3 - boards/arm/mps2/mps2-pinctrl.dtsi | 67 +++++++ boards/arm/mps2/mps2_an521-common.dtsi | 14 ++ boards/arm/mps2/mps2_an521_cpu0.dts | 3 + boards/arm/mps2/mps2_an521_cpu0_ns.dts | 2 + boards/arm/mps2/mps2_an521_cpu1.dts | 3 + boards/arm/mps2/mps2_base.dtsi | 17 +- boards/arm/mps2/pinmux.c | 164 ------------------ .../boards/arm/mps2/mps2-pinctrl.dtsi | 67 +++++++ .../boards/arm/mps2/mps2_an521-common.dtsi | 14 ++ .../boards/arm/mps2/mps2_an521_cputest.dts | 3 + 11 files changed, 189 insertions(+), 168 deletions(-) create mode 100644 boards/arm/mps2/mps2-pinctrl.dtsi delete mode 100644 boards/arm/mps2/pinmux.c create mode 100644 tests/cmake/hwm/board_extend/oot_root/boards/arm/mps2/mps2-pinctrl.dtsi diff --git a/boards/arm/mps2/CMakeLists.txt b/boards/arm/mps2/CMakeLists.txt index 2f6cea861c6..7a2209df8f8 100644 --- a/boards/arm/mps2/CMakeLists.txt +++ b/boards/arm/mps2/CMakeLists.txt @@ -1,8 +1,5 @@ # SPDX-License-Identifier: Apache-2.0 -zephyr_library() -zephyr_library_sources(pinmux.c) - if(CONFIG_BOARD_MPS2_AN521_CPU1 AND NOT CONFIG_OPENAMP) # Building a firmware image for CPU1: this requires a binary # for CPU0, which will boot the device and wake up CPU1. diff --git a/boards/arm/mps2/mps2-pinctrl.dtsi b/boards/arm/mps2/mps2-pinctrl.dtsi new file mode 100644 index 00000000000..da259040e97 --- /dev/null +++ b/boards/arm/mps2/mps2-pinctrl.dtsi @@ -0,0 +1,67 @@ +/* + * Copyright 2025 Arm Limited and/or its affiliates + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + /omit-if-no-ref/ uart3_default: uart3_default { + group1 { + pinmux = ; + }; + + group2 { + pinmux = ; + input-enable; + }; + }; + + /omit-if-no-ref/ uart4_default: uart4_default { + group1 { + pinmux = ; + }; + + group2 { + pinmux = ; + input-enable; + }; + }; + + /omit-if-no-ref/ spi0_default: spi0_default { + group1 { + pinmux = , , + ; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + /omit-if-no-ref/ spi1_default: spi1_default { + group1 { + pinmux = , , + ; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + /omit-if-no-ref/ sbcon0_default: sbcon0_default { + group1 { + pinmux = , ; + input-enable; + }; + }; + + /omit-if-no-ref/ sbcon1_default: sbcon1_default { + group1 { + pinmux = , ; + input-enable; + }; + }; +}; diff --git a/boards/arm/mps2/mps2_an521-common.dtsi b/boards/arm/mps2/mps2_an521-common.dtsi index acd2be8da72..b96f1144982 100644 --- a/boards/arm/mps2/mps2_an521-common.dtsi +++ b/boards/arm/mps2/mps2_an521-common.dtsi @@ -1,5 +1,6 @@ /* * Copyright (c) 2019 Linaro Limited + * Copyright 2025 Arm Limited and/or its affiliates * * SPDX-License-Identifier: Apache-2.0 */ @@ -112,6 +113,8 @@ uart3: uart@203000 { interrupt-names = "tx", "rx"; clocks = <&sysclk>; current-speed = <115200>; + pinctrl-0 = <&uart3_default>; + pinctrl-names = "default"; }; uart4: uart@204000 { @@ -121,6 +124,8 @@ uart4: uart@204000 { interrupt-names = "tx", "rx"; clocks = <&sysclk>; current-speed = <115200>; + pinctrl-0 = <&uart4_default>; + pinctrl-names = "default"; }; i2c_touch: i2c@207000 { @@ -145,6 +150,8 @@ i2c_shield0: i2c@20c000 { #address-cells = <1>; #size-cells = <0>; reg = <0x20c000 0x1000>; + pinctrl-0 = <&sbcon0_default>; + pinctrl-names = "default"; }; i2c_shield1: i2c@20d000 { @@ -153,6 +160,8 @@ i2c_shield1: i2c@20d000 { #address-cells = <1>; #size-cells = <0>; reg = <0x20d000 0x1000>; + pinctrl-0 = <&sbcon1_default>; + pinctrl-names = "default"; }; gpio_led0: mps2_fpgaio@302000 { @@ -190,3 +199,8 @@ eth0: eth@2000000 { reg = <0x2000000 0x100000>; interrupts = <48 3>; }; + +pinctrl: pinctrl { + compatible = "arm,mps2-pinctrl"; + status = "okay"; +}; diff --git a/boards/arm/mps2/mps2_an521_cpu0.dts b/boards/arm/mps2/mps2_an521_cpu0.dts index 2bb956645ca..532384377da 100644 --- a/boards/arm/mps2/mps2_an521_cpu0.dts +++ b/boards/arm/mps2/mps2_an521_cpu0.dts @@ -1,5 +1,6 @@ /* * Copyright (c) 2018-2019 Linaro Limited + * Copyright 2025 Arm Limited and/or its affiliates * * SPDX-License-Identifier: Apache-2.0 */ @@ -128,3 +129,5 @@ &uart1 { status = "okay"; }; + +#include "mps2-pinctrl.dtsi" diff --git a/boards/arm/mps2/mps2_an521_cpu0_ns.dts b/boards/arm/mps2/mps2_an521_cpu0_ns.dts index e2b24cd9ba5..d67718fcc59 100644 --- a/boards/arm/mps2/mps2_an521_cpu0_ns.dts +++ b/boards/arm/mps2/mps2_an521_cpu0_ns.dts @@ -1,5 +1,6 @@ /* * Copyright (c) 2018-2019 Linaro Limited + * Copyright 2025 Arm Limited and/or its affiliates * * SPDX-License-Identifier: Apache-2.0 */ @@ -142,3 +143,4 @@ &nvic { arm,num-irq-priority-bits = <3>; }; +#include "mps2-pinctrl.dtsi" diff --git a/boards/arm/mps2/mps2_an521_cpu1.dts b/boards/arm/mps2/mps2_an521_cpu1.dts index 311694ca399..24b39b50978 100644 --- a/boards/arm/mps2/mps2_an521_cpu1.dts +++ b/boards/arm/mps2/mps2_an521_cpu1.dts @@ -1,5 +1,6 @@ /* * Copyright (c) 2018-2019 Linaro Limited + * Copyright 2025 Arm Limited and/or its affiliates * * SPDX-License-Identifier: Apache-2.0 */ @@ -144,3 +145,5 @@ &nvic { arm,num-irq-priority-bits = <3>; }; + +#include "mps2-pinctrl.dtsi" diff --git a/boards/arm/mps2/mps2_base.dtsi b/boards/arm/mps2/mps2_base.dtsi index 0733b6e342d..021373fac43 100644 --- a/boards/arm/mps2/mps2_base.dtsi +++ b/boards/arm/mps2/mps2_base.dtsi @@ -1,4 +1,4 @@ -/* Copyright 2024 Arm Limited and/or its affiliates */ +/* Copyright 2024-2025 Arm Limited and/or its affiliates */ /* SPDX-License-Identifier: Apache-2.0 */ / { @@ -145,6 +145,8 @@ interrupt-names = "tx", "rx"; clocks = <&sysclk>; current-speed = <115200>; + pinctrl-0 = <&uart3_default>; + pinctrl-names = "default"; }; wdog0: wdog@40008000 { @@ -160,6 +162,8 @@ interrupt-names = "tx", "rx"; clocks = <&sysclk>; current-speed = <115200>; + pinctrl-0 = <&uart4_default>; + pinctrl-names = "default"; }; gpio0: gpio@40010000 { @@ -225,6 +229,8 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x40029000 0x1000>; + pinctrl-0 = <&sbcon0_default>; + pinctrl-names = "default"; }; i2c_shield1: i2c@4002a000 { @@ -233,6 +239,8 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x4002a000 0x1000>; + pinctrl-0 = <&sbcon1_default>; + pinctrl-names = "default"; }; gpio_led0: mps2_fpgaio@40028000 { @@ -260,8 +268,15 @@ ngpios = <10>; }; }; + + pinctrl: pinctrl { + compatible = "arm,mps2-pinctrl"; + status = "okay"; + }; }; &nvic { arm,num-irq-priority-bits = <3>; }; + +#include "mps2-pinctrl.dtsi" diff --git a/boards/arm/mps2/pinmux.c b/boards/arm/mps2/pinmux.c deleted file mode 100644 index 6cf93983072..00000000000 --- a/boards/arm/mps2/pinmux.c +++ /dev/null @@ -1,164 +0,0 @@ -/* - * Copyright (c) 2016 Linaro Limited - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include -#include -#include -#include - -/** - * @brief Pinmux driver for ARM MPS2 AN385 Board - * - * The ARM MPS2 AN385 Board has 4 GPIO controllers. These controllers - * are responsible for pin muxing, input/output, pull-up, etc. - * - * All GPIO controller pins are exposed via the following sequence of pin - * numbers: - * Pins 0 - 15 are for GPIO0 - * Pins 16 - 31 are for GPIO1 - * Pins 32 - 47 are for GPIO2 - * Pins 48 - 51 are for GPIO3 - * - * For the GPIO controllers configuration ARM MPS2 AN385 Board follows the - * Arduino compliant pin out. - */ - -#define CMSDK_AHB_GPIO0_DEV \ - ((volatile struct gpio_cmsdk_ahb *)DT_REG_ADDR(DT_NODELABEL(gpio0))) -#define CMSDK_AHB_GPIO1_DEV \ - ((volatile struct gpio_cmsdk_ahb *)DT_REG_ADDR(DT_NODELABEL(gpio1))) -#define CMSDK_AHB_GPIO2_DEV \ - ((volatile struct gpio_cmsdk_ahb *)DT_REG_ADDR(DT_NODELABEL(gpio2))) -#define CMSDK_AHB_GPIO3_DEV \ - ((volatile struct gpio_cmsdk_ahb *)DT_REG_ADDR(DT_NODELABEL(gpio3))) - -/* - * This is the mapping from the ARM MPS2 AN385 Board pins to GPIO - * controllers. - * - * D0 : EXT_0 - * D1 : EXT_4 - * D2 : EXT_2 - * D3 : EXT_3 - * D4 : EXT_1 - * D5 : EXT_6 - * D6 : EXT_7 - * D7 : EXT_8 - * D8 : EXT_9 - * D9 : EXT_10 - * D10 : EXT_12 - * D11 : EXT_13 - * D12 : EXT_14 - * D13 : EXT_11 - * D14 : EXT_15 - * D15 : EXT_5 - * D16 : EXT_16 - * D17 : EXT_17 - * D18 : EXT_18 - * D19 : EXT_19 - * D20 : EXT_20 - * D21 : EXT_21 - * D22 : EXT_22 - * D23 : EXT_23 - * D24 : EXT_24 - * D25 : EXT_25 - * D26 : EXT_26 - * D27 : EXT_30 - * D28 : EXT_28 - * D29 : EXT_29 - * D30 : EXT_27 - * D31 : EXT_32 - * D32 : EXT_33 - * D33 : EXT_34 - * D34 : EXT_35 - * D35 : EXT_36 - * D36 : EXT_38 - * D37 : EXT_39 - * D38 : EXT_40 - * D39 : EXT_44 - * D40 : EXT_41 - * D41 : EXT_31 - * D42 : EXT_37 - * D43 : EXT_42 - * D44 : EXT_43 - * D45 : EXT_45 - * D46 : EXT_46 - * D47 : EXT_47 - * D48 : EXT_48 - * D49 : EXT_49 - * D50 : EXT_50 - * D51 : EXT_51 - * - * UART_3_RX : D0 - * UART_3_TX : D1 - * SPI_3_CS : D10 - * SPI_3_MOSI : D11 - * SPI_3_MISO : D12 - * SPI_3_SCLK : D13 - * I2C_3_SDA : D14 - * I2C_3_SCL : D15 - * UART_4_RX : D26 - * UART_4_TX : D30 - * SPI_4_CS : D36 - * SPI_4_MOSI : D37 - * SPI_4_MISO : D38 - * SPI_4_SCK : D39 - * I2C_4_SDA : D40 - * I2C_4_SCL : D41 - * - */ -static void arm_mps2_pinmux_defaults(void) -{ - uint32_t gpio_0 = 0U; - uint32_t gpio_1 = 0U; - uint32_t gpio_2 = 0U; - - /* Set GPIO Alternate Functions */ - - gpio_0 = (1<<0) /* Shield 0 UART 3 RXD */ - | (1<<4) /* Shield 0 UART 3 TXD */ - | (1<<5) /* Shield 0 I2C SCL SBCON2 */ - | (1<<15) /* Shield 0 I2C SDA SBCON2 */ - | (1<<11) /* Shield 0 SPI 3 SCK */ - | (1<<12) /* Shield 0 SPI 3 SS */ - | (1<<13) /* Shield 0 SPI 3 MOSI */ - | (1<<14); /* Shield 0 SPI 3 MISO */ - - CMSDK_AHB_GPIO0_DEV->altfuncset = gpio_0; - - gpio_1 = (1<<10) /* Shield 1 UART 4 RXD */ - | (1<<14) /* Shield 1 UART 4 TXD */ - | (1<<15) /* Shield 1 I2C SCL SBCON3 */ - | (1<<0) /* ADC SPI 2 SS */ - | (1<<1) /* ADC SPI 2 MISO */ - | (1<<2) /* ADC SPI 2 MOSI */ - | (1<<3) /* ADC SPI 2 SCK */ - | (1<<5) /* USER BUTTON 0 */ - | (1<<6); /* USER BUTTON 1 */ - - CMSDK_AHB_GPIO1_DEV->altfuncset = gpio_1; - - gpio_2 = (1<<9) /* Shield 1 I2C SDA SBCON3 */ - | (1<<6) /* Shield 1 SPI 4 SS */ - | (1<<7) /* Shield 1 SPI 4 MOSI */ - | (1<<8) /* Shield 1 SPI 4 MISO */ - | (1<<12); /* Shield 1 SPI 4 SCK */ - - CMSDK_AHB_GPIO2_DEV->altfuncset = gpio_2; -} - -static int arm_mps2_pinmux_init(void) -{ - - arm_mps2_pinmux_defaults(); - - return 0; -} - -SYS_INIT(arm_mps2_pinmux_init, PRE_KERNEL_1, - CONFIG_KERNEL_INIT_PRIORITY_DEFAULT); diff --git a/tests/cmake/hwm/board_extend/oot_root/boards/arm/mps2/mps2-pinctrl.dtsi b/tests/cmake/hwm/board_extend/oot_root/boards/arm/mps2/mps2-pinctrl.dtsi new file mode 100644 index 00000000000..da259040e97 --- /dev/null +++ b/tests/cmake/hwm/board_extend/oot_root/boards/arm/mps2/mps2-pinctrl.dtsi @@ -0,0 +1,67 @@ +/* + * Copyright 2025 Arm Limited and/or its affiliates + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + /omit-if-no-ref/ uart3_default: uart3_default { + group1 { + pinmux = ; + }; + + group2 { + pinmux = ; + input-enable; + }; + }; + + /omit-if-no-ref/ uart4_default: uart4_default { + group1 { + pinmux = ; + }; + + group2 { + pinmux = ; + input-enable; + }; + }; + + /omit-if-no-ref/ spi0_default: spi0_default { + group1 { + pinmux = , , + ; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + /omit-if-no-ref/ spi1_default: spi1_default { + group1 { + pinmux = , , + ; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + /omit-if-no-ref/ sbcon0_default: sbcon0_default { + group1 { + pinmux = , ; + input-enable; + }; + }; + + /omit-if-no-ref/ sbcon1_default: sbcon1_default { + group1 { + pinmux = , ; + input-enable; + }; + }; +}; diff --git a/tests/cmake/hwm/board_extend/oot_root/boards/arm/mps2/mps2_an521-common.dtsi b/tests/cmake/hwm/board_extend/oot_root/boards/arm/mps2/mps2_an521-common.dtsi index acd2be8da72..b96f1144982 100644 --- a/tests/cmake/hwm/board_extend/oot_root/boards/arm/mps2/mps2_an521-common.dtsi +++ b/tests/cmake/hwm/board_extend/oot_root/boards/arm/mps2/mps2_an521-common.dtsi @@ -1,5 +1,6 @@ /* * Copyright (c) 2019 Linaro Limited + * Copyright 2025 Arm Limited and/or its affiliates * * SPDX-License-Identifier: Apache-2.0 */ @@ -112,6 +113,8 @@ uart3: uart@203000 { interrupt-names = "tx", "rx"; clocks = <&sysclk>; current-speed = <115200>; + pinctrl-0 = <&uart3_default>; + pinctrl-names = "default"; }; uart4: uart@204000 { @@ -121,6 +124,8 @@ uart4: uart@204000 { interrupt-names = "tx", "rx"; clocks = <&sysclk>; current-speed = <115200>; + pinctrl-0 = <&uart4_default>; + pinctrl-names = "default"; }; i2c_touch: i2c@207000 { @@ -145,6 +150,8 @@ i2c_shield0: i2c@20c000 { #address-cells = <1>; #size-cells = <0>; reg = <0x20c000 0x1000>; + pinctrl-0 = <&sbcon0_default>; + pinctrl-names = "default"; }; i2c_shield1: i2c@20d000 { @@ -153,6 +160,8 @@ i2c_shield1: i2c@20d000 { #address-cells = <1>; #size-cells = <0>; reg = <0x20d000 0x1000>; + pinctrl-0 = <&sbcon1_default>; + pinctrl-names = "default"; }; gpio_led0: mps2_fpgaio@302000 { @@ -190,3 +199,8 @@ eth0: eth@2000000 { reg = <0x2000000 0x100000>; interrupts = <48 3>; }; + +pinctrl: pinctrl { + compatible = "arm,mps2-pinctrl"; + status = "okay"; +}; diff --git a/tests/cmake/hwm/board_extend/oot_root/boards/arm/mps2/mps2_an521_cputest.dts b/tests/cmake/hwm/board_extend/oot_root/boards/arm/mps2/mps2_an521_cputest.dts index 2bb956645ca..532384377da 100644 --- a/tests/cmake/hwm/board_extend/oot_root/boards/arm/mps2/mps2_an521_cputest.dts +++ b/tests/cmake/hwm/board_extend/oot_root/boards/arm/mps2/mps2_an521_cputest.dts @@ -1,5 +1,6 @@ /* * Copyright (c) 2018-2019 Linaro Limited + * Copyright 2025 Arm Limited and/or its affiliates * * SPDX-License-Identifier: Apache-2.0 */ @@ -128,3 +129,5 @@ &uart1 { status = "okay"; }; + +#include "mps2-pinctrl.dtsi"