diff --git a/dts/arm64/intel/intel_socfpga_agilex.dtsi b/dts/arm64/intel/intel_socfpga_agilex.dtsi
index e3b3e9b17ca..7083e38c7de 100644
--- a/dts/arm64/intel/intel_socfpga_agilex.dtsi
+++ b/dts/arm64/intel/intel_socfpga_agilex.dtsi
@@ -99,6 +99,10 @@
 		reg = <0x10000000 0x200000>;
 	};
 
+	fpga0: bridges {
+		compatible = "altr,socfpga-agilex-bridge";
+	};
+
 	uart0: uart@ffc02000 {
 		compatible = "ns16550";
 		reg-shift = <2>;
diff --git a/dts/arm64/intel/intel_socfpga_agilex5.dtsi b/dts/arm64/intel/intel_socfpga_agilex5.dtsi
index 21cf2e68ed0..b23830521bf 100644
--- a/dts/arm64/intel/intel_socfpga_agilex5.dtsi
+++ b/dts/arm64/intel/intel_socfpga_agilex5.dtsi
@@ -97,6 +97,10 @@
 		reg = <0x80100000 DT_SIZE_M(8)>;
 	};
 
+	fpga0: bridges {
+		compatible = "altr,socfpga-agilex-bridge";
+	};
+
 	uart0: uart@10c02000 {
 		compatible = "ns16550";
 		reg-shift = <2>;