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Introduces driver for SSD1331 RGB OLED controller Signed-off-by: Camille BAUD <mail@massdriver.space>pull/89566/head
5 changed files with 514 additions and 0 deletions
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# SSD1331 display controller configuration options |
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# Copyright (c) 2025 MASSDRIVER EI (massdriver.space) |
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# SPDX-License-Identifier: Apache-2.0 |
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menuconfig SSD1331 |
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bool "SSD1331 display controller driver" |
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default y |
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depends on DT_HAS_SOLOMON_SSD1331_ENABLED |
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select MIPI_DBI |
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help |
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Enable driver for SSD1331 display controller. |
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if SSD1331 |
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config SSD1331_DEFAULT_CONTRAST |
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int "SSD1331 default contrast" |
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default 100 |
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range 0 255 |
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help |
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SSD1331 default contrast. |
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config SSD1331_CONTRASTA |
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int "SSD1331 contrast multiplier for seg A" |
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default 145 |
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range 0 255 |
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help |
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Contrast multiplier for seg A |
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config SSD1331_CONTRASTB |
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int "SSD1331 contrast multiplier for seg B" |
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default 80 |
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range 0 255 |
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help |
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Contrast multiplier for seg B |
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config SSD1331_CONTRASTC |
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int "SSD1331 contrast multiplier for seg C" |
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default 125 |
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range 0 255 |
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help |
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Contrast multiplier for seg C |
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endif # SSD1331 |
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/*
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* Copyright (c) 2025 MASSDRIVER EI (massdriver.space) |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#include <zephyr/logging/log.h> |
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LOG_MODULE_REGISTER(ssd1331, CONFIG_DISPLAY_LOG_LEVEL); |
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#include <string.h> |
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#include <zephyr/device.h> |
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#include <zephyr/init.h> |
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#include <zephyr/drivers/display.h> |
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#include <zephyr/drivers/gpio.h> |
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#include <zephyr/drivers/mipi_dbi.h> |
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#include <zephyr/kernel.h> |
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#define SSD1331_DISPLAY_OFF 0xAE |
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#define SSD1331_DISPLAY_ON 0xAF |
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#define SSD1331_SET_NORMAL_DISPLAY 0xA4 |
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#define SSD1331_SET_REVERSE_DISPLAY 0xA7 |
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#define SSD1331_SET_COLUMN_ADDR 0x15 |
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#define SSD1331_SET_ROW_ADDR 0x75 |
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#define SSD1331_SET_DISPLAY_START_LINE 0xA1 |
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#define SSD1331_SET_DISPLAY_OFFSET 0xA2 |
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#define SSD1331_SET_MULTIPLEX_RATIO 0xA8 |
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#define SSD1331_SET_PHASE_LENGTH 0xB1 |
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#define SSD1331_SET_OSC_FREQ 0xB3 |
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#define SSD1331_SET_PRECHARGE_A 0x8A |
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#define SSD1331_SET_PRECHARGE_B 0x8B |
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#define SSD1331_SET_PRECHARGE_C 0x8C |
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#define SSD1331_SET_PRECHARGE_V 0xBB |
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#define SSD1331_SET_VCOMH 0xBE |
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#define SSD1331_SET_CURRENT_ATT 0x87 |
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#define SSD1331_SET_REMAP 0xA0 |
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#define SSD1331_DISABLE_SCROLL 0x2E |
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#define SSD1331_SET_EXTERNAL_SUPPLY 0xAD |
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#define SSD1331_EXTERNAL_SUPPLY 0x8E |
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#define SSD1331_SET_POWER_SAVE 0xB0 |
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#define SSD1331_POWER_SAVE 0x1A |
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#define SSD1331_NOT_POWER_SAVE 0x0B |
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#define SSD1331_CONTRASTA 0x81 |
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#define SSD1331_CONTRASTB 0x82 |
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#define SSD1331_CONTRASTC 0x83 |
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#define SSD1331_RESET_DELAY 10 |
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struct ssd1331_config { |
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const struct device *mipi_dev; |
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const struct mipi_dbi_config dbi_config; |
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uint16_t height; |
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uint16_t width; |
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uint8_t start_line; |
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uint8_t display_offset; |
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uint8_t multiplex_ratio; |
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uint8_t phase_length; |
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uint8_t oscillator_freq; |
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uint8_t precharge_time_a; |
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uint8_t precharge_time_b; |
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uint8_t precharge_time_c; |
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uint8_t precharge_voltage; |
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uint8_t vcomh_voltage; |
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uint8_t current_att; |
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uint8_t remap_value; |
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bool power_save; |
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bool color_inversion; |
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}; |
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/* SSD1331 doesn't follow typical DBI behavior with D/C pin so we do this to make it fit in DBI */ |
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static inline int ssd1331_write_command(const struct device *dev, uint8_t cmd, const uint8_t *buf, |
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size_t len) |
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{ |
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const struct ssd1331_config *config = dev->config; |
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int err; |
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err = mipi_dbi_command_write(config->mipi_dev, &config->dbi_config, cmd, NULL, 0); |
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if (err < 0) { |
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return err; |
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} |
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for (int x = 0; x < len; x++) { |
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err = mipi_dbi_command_write(config->mipi_dev, &config->dbi_config, buf[x], NULL, |
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0); |
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if (err < 0) { |
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return err; |
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} |
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} |
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return err; |
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} |
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static inline int ssd1331_set_hardware_config(const struct device *dev) |
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{ |
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const struct ssd1331_config *config = dev->config; |
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int err; |
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uint8_t tmp; |
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err = ssd1331_write_command(dev, SSD1331_SET_REMAP, &config->remap_value, 1); |
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if (err < 0) { |
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return err; |
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} |
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err = ssd1331_write_command(dev, SSD1331_SET_DISPLAY_START_LINE, &config->start_line, 1); |
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if (err < 0) { |
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return err; |
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} |
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err = ssd1331_write_command(dev, SSD1331_SET_DISPLAY_OFFSET, &config->display_offset, 1); |
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if (err < 0) { |
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return err; |
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} |
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err = ssd1331_write_command(dev, SSD1331_SET_MULTIPLEX_RATIO, &config->multiplex_ratio, 1); |
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if (err < 0) { |
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return err; |
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} |
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tmp = SSD1331_EXTERNAL_SUPPLY; |
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err = ssd1331_write_command(dev, SSD1331_SET_EXTERNAL_SUPPLY, &tmp, 1); |
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if (err < 0) { |
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return err; |
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} |
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tmp = config->power_save ? SSD1331_POWER_SAVE : SSD1331_NOT_POWER_SAVE; |
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err = ssd1331_write_command(dev, SSD1331_SET_POWER_SAVE, &tmp, 1); |
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if (err < 0) { |
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return err; |
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} |
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err = ssd1331_write_command(dev, SSD1331_SET_PHASE_LENGTH, &config->phase_length, 1); |
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if (err < 0) { |
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return err; |
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} |
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err = ssd1331_write_command(dev, SSD1331_SET_OSC_FREQ, &config->oscillator_freq, 1); |
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if (err < 0) { |
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return err; |
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} |
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err = ssd1331_write_command(dev, SSD1331_SET_PRECHARGE_A, &config->precharge_time_a, 1); |
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if (err < 0) { |
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return err; |
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} |
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err = ssd1331_write_command(dev, SSD1331_SET_PRECHARGE_B, &config->precharge_time_b, 1); |
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if (err < 0) { |
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return err; |
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} |
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err = ssd1331_write_command(dev, SSD1331_SET_PRECHARGE_C, &config->precharge_time_c, 1); |
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if (err < 0) { |
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return err; |
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} |
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err = ssd1331_write_command(dev, SSD1331_SET_PRECHARGE_V, &config->precharge_voltage, 1); |
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if (err < 0) { |
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return err; |
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} |
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err = ssd1331_write_command(dev, SSD1331_SET_VCOMH, &config->vcomh_voltage, 1); |
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if (err < 0) { |
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return err; |
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} |
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err = ssd1331_write_command(dev, SSD1331_SET_CURRENT_ATT, &config->current_att, 1); |
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if (err < 0) { |
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return err; |
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} |
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return ssd1331_write_command(dev, SSD1331_DISABLE_SCROLL, NULL, 0); |
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} |
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static int ssd1331_resume(const struct device *dev) |
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{ |
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const struct ssd1331_config *config = dev->config; |
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int err; |
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err = ssd1331_write_command(dev, SSD1331_DISPLAY_ON, NULL, 0); |
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if (err < 0) { |
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return err; |
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} |
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return mipi_dbi_release(config->mipi_dev, &config->dbi_config); |
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} |
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static int ssd1331_suspend(const struct device *dev) |
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{ |
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const struct ssd1331_config *config = dev->config; |
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int err; |
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err = ssd1331_write_command(dev, SSD1331_DISPLAY_OFF, NULL, 0); |
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if (err < 0) { |
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return err; |
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} |
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return mipi_dbi_release(config->mipi_dev, &config->dbi_config); |
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} |
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static int ssd1331_write(const struct device *dev, const uint16_t x, const uint16_t y, |
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const struct display_buffer_descriptor *desc, const void *buf) |
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{ |
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const struct ssd1331_config *config = dev->config; |
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int err; |
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size_t buf_len; |
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struct display_buffer_descriptor mipi_desc = *desc; |
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uint8_t x_position[] = {x, x + desc->width - 1}; |
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uint8_t y_position[] = {y, y + desc->height - 1}; |
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if (desc->pitch != desc->width) { |
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LOG_ERR("Pitch is not width"); |
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return -EINVAL; |
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} |
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/* Following the datasheet, two segment are split in one register */ |
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buf_len = MIN(desc->buf_size, desc->height * desc->width * 2); |
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if (buf == NULL || buf_len == 0U) { |
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LOG_ERR("Display buffer is not available"); |
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return -EINVAL; |
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} |
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LOG_DBG("x %u, y %u, pitch %u, width %u, height %u, buf_len %u", x, y, desc->pitch, |
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desc->width, desc->height, buf_len); |
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err = ssd1331_write_command(dev, SSD1331_SET_COLUMN_ADDR, x_position, 2); |
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if (err < 0) { |
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return err; |
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} |
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err = ssd1331_write_command(dev, SSD1331_SET_ROW_ADDR, y_position, 2); |
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if (err < 0) { |
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return err; |
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} |
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err = mipi_dbi_write_display(config->mipi_dev, &config->dbi_config, buf, &mipi_desc, |
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PIXEL_FORMAT_RGB_565); |
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if (err < 0) { |
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return err; |
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} |
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return mipi_dbi_release(config->mipi_dev, &config->dbi_config); |
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} |
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static int ssd1331_set_contrast(const struct device *dev, const uint8_t contrast) |
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{ |
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int err; |
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uint8_t tmp; |
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tmp = (contrast * CONFIG_SSD1331_CONTRASTA) / 0xFF; |
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err = ssd1331_write_command(dev, SSD1331_CONTRASTA, &tmp, 1); |
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if (err < 0) { |
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return err; |
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} |
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tmp = (contrast * CONFIG_SSD1331_CONTRASTB) / 0xFF; |
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err = ssd1331_write_command(dev, SSD1331_CONTRASTB, &tmp, 1); |
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if (err < 0) { |
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return err; |
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} |
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tmp = (contrast * CONFIG_SSD1331_CONTRASTC) / 0xFF; |
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return ssd1331_write_command(dev, SSD1331_CONTRASTC, &tmp, 1); |
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} |
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static void ssd1331_get_capabilities(const struct device *dev, struct display_capabilities *caps) |
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{ |
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const struct ssd1331_config *config = dev->config; |
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memset(caps, 0, sizeof(struct display_capabilities)); |
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caps->x_resolution = config->width; |
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caps->y_resolution = config->height; |
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caps->supported_pixel_formats = PIXEL_FORMAT_RGB_565; |
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caps->current_pixel_format = PIXEL_FORMAT_RGB_565; |
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caps->screen_info = 0; |
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} |
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static int ssd1331_set_pixel_format(const struct device *dev, const enum display_pixel_format pf) |
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{ |
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if (pf == PIXEL_FORMAT_RGB_565) { |
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return 0; |
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} |
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LOG_ERR("Unsupported pixel format"); |
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return -ENOTSUP; |
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} |
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static int ssd1331_init_device(const struct device *dev) |
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{ |
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const struct ssd1331_config *config = dev->config; |
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int err; |
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/* Turn display off */ |
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err = ssd1331_suspend(dev); |
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if (err < 0) { |
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return err; |
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} |
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err = ssd1331_set_hardware_config(dev); |
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if (err < 0) { |
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return err; |
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} |
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err = ssd1331_set_contrast(dev, CONFIG_SSD1331_DEFAULT_CONTRAST); |
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if (err < 0) { |
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return err; |
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} |
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err = ssd1331_write_command(dev, |
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config->color_inversion ? SSD1331_SET_REVERSE_DISPLAY |
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: SSD1331_SET_NORMAL_DISPLAY, |
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NULL, 0); |
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if (err < 0) { |
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return err; |
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} |
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err = ssd1331_resume(dev); |
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if (err < 0) { |
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return err; |
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} |
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return mipi_dbi_release(config->mipi_dev, &config->dbi_config); |
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} |
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static int ssd1331_init(const struct device *dev) |
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{ |
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const struct ssd1331_config *config = dev->config; |
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int err; |
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LOG_DBG("Initializing device"); |
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if (!device_is_ready(config->mipi_dev)) { |
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LOG_ERR("MIPI Device not ready!"); |
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return -EINVAL; |
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} |
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err = mipi_dbi_reset(config->mipi_dev, SSD1331_RESET_DELAY); |
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if (err < 0) { |
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LOG_ERR("Failed to reset device!"); |
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return err; |
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} |
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err = ssd1331_init_device(dev); |
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if (err < 0) { |
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LOG_ERR("Failed to initialize device! %d", err); |
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return err; |
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} |
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return 0; |
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} |
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static DEVICE_API(display, ssd1331_driver_api) = { |
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.blanking_on = ssd1331_suspend, |
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.blanking_off = ssd1331_resume, |
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.write = ssd1331_write, |
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.set_contrast = ssd1331_set_contrast, |
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.get_capabilities = ssd1331_get_capabilities, |
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.set_pixel_format = ssd1331_set_pixel_format, |
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}; |
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#define SSD1331_WORD_SIZE(inst) \ |
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((DT_STRING_UPPER_TOKEN(inst, mipi_mode) == MIPI_DBI_MODE_SPI_4WIRE) ? SPI_WORD_SET(8) \ |
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: SPI_WORD_SET(9)) |
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#define SSD1331_DEFINE_MIPI(node_id) \ |
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static const struct ssd1331_config config##node_id = { \ |
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.mipi_dev = DEVICE_DT_GET(DT_PARENT(node_id)), \ |
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.dbi_config = MIPI_DBI_CONFIG_DT( \ |
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node_id, SSD1331_WORD_SIZE(node_id) | SPI_OP_MODE_MASTER, 0), \ |
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.height = DT_PROP(node_id, height), \ |
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.width = DT_PROP(node_id, width), \ |
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.display_offset = DT_PROP(node_id, display_offset), \ |
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.start_line = DT_PROP(node_id, start_line), \ |
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.multiplex_ratio = DT_PROP(node_id, multiplex_ratio), \ |
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.phase_length = DT_PROP(node_id, phase_length), \ |
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.oscillator_freq = DT_PROP(node_id, oscillator_freq), \ |
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.power_save = DT_PROP(node_id, power_save), \ |
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.precharge_time_a = DT_PROP(node_id, precharge_time_a), \ |
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.precharge_time_b = DT_PROP(node_id, precharge_time_b), \ |
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.precharge_time_c = DT_PROP(node_id, precharge_time_c), \ |
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.precharge_voltage = DT_PROP(node_id, precharge_voltage), \ |
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.vcomh_voltage = DT_PROP(node_id, vcomh_voltage), \ |
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.current_att = DT_PROP(node_id, current_att), \ |
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.color_inversion = DT_PROP(node_id, inversion_on), \ |
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.remap_value = DT_PROP(node_id, remap_value), \ |
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}; \ |
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\ |
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DEVICE_DT_DEFINE(node_id, ssd1331_init, NULL, NULL, &config##node_id, \ |
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POST_KERNEL, CONFIG_DISPLAY_INIT_PRIORITY, &ssd1331_driver_api); |
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DT_FOREACH_STATUS_OKAY(solomon_ssd1331, SSD1331_DEFINE_MIPI) |
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@@ -0,0 +1,96 @@
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# Copyright (c) 2025 MASSDRIVER EI (massdriver.space) |
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# SPDX-License-Identifier: Apache-2.0 |
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description: SSD1331 display controller |
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compatible: "solomon,ssd1331" |
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include: [mipi-dbi-spi-device.yaml, display-controller.yaml] |
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properties: |
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display-offset: |
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type: int |
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required: true |
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description: Vertical offset by com from 0 ~ 63. Typically 64 - height. |
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start-line: |
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type: int |
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required: true |
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description: Start line of display RAM to be displayed by selecting a value from 0 to 63. |
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Typically 0. |
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multiplex-ratio: |
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type: int |
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required: true |
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description: Multiplex ratio from 16MUX to 64MUX, ranges from 15 to 63. |
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Typically same value as height - 1. |
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phase-length: |
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type: int |
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required: true |
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description: Phase 2 Period (7:4) and Phase 1 Period (3:0). |
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oscillator-freq: |
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type: int |
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required: true |
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description: Front clock divider (3:0) / oscillator frequency (7:4). |
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If you get weird scanlines, increase oscillator frequency and play with phase length values, |
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for example set this to 0xF0. Note this increases power consumption. |
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precharge-time-a: |
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type: int |
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required: true |
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description: Set precharge time for segments A. Typically around 0x70. |
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precharge-time-b: |
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type: int |
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required: true |
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description: Set precharge time for segments B. Typically around 0x70. |
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precharge-time-c: |
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type: int |
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required: true |
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description: Set precharge time for segments C. Typically around 0x70. |
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precharge-voltage: |
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type: int |
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required: true |
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description: Set precharge voltage. A[5:1], from 0 (0.10 x VCC) to 0x3E (0.5 x VCC) |
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vcomh-voltage: |
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type: int |
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required: true |
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enum: |
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- 0x0 |
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- 0x10 |
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- 0x20 |
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- 0x30 |
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- 0x3E |
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description: Set COM deselect voltage. A[5:1]. 0.44, 0.52, 0.61, 0.71, 0.83 x VCC. |
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|
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current-att: |
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type: int |
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required: true |
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description: Set Master current attenuation. A[3:0], from 1/16 to 16/16. |
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remap-value: |
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type: int |
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required: true |
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description: Remap register |
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|
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Has multiple configurations (see each bit setting in the datasheet) |
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- A[0] HTiled or VTiled. Must be 0 for this driver. |
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- A[1] Invert segment order |
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- A[2] Invert ABC segment order |
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- A[3] Left-Right Swap COMs |
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- A[4] Invert COM order |
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- A[5] Stripped odd/even display |
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- A[7:6] Set color format. Must be 0x1 for this driver. |
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|
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power-save: |
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type: boolean |
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description: Enable Power Save mode |
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|
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inversion-on: |
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type: boolean |
||||
description: Turn on display color inverting |
Loading…
Reference in new issue