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drivers: ambiq: Change the way to power on ambiq drivers 

This commit changes to use ambiq hal power control APIs
to replace the previous register settings to power on
ambiq drivers.

Signed-off-by: Hao Luo <hluo@ambiq.com>
pull/87253/head
Hao Luo 4 months ago committed by Benjamin Cabé
parent
b11703623c
commit
4744d138c2
18 changed files with 15 additions and 179 deletions
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  1. 14
      drivers/adc/adc_ambiq.c
  2. 15
      drivers/i2c/i2c_ambiq.c
  3. 2
      drivers/serial/uart_pl011_ambiq.h
  4. 18
      drivers/spi/spi_ambiq_bleif.c
  5. 18
      drivers/spi/spi_ambiq_spic.c
  6. 18
      drivers/spi/spi_ambiq_spid.c
  7. 16
      dts/arm/ambiq/ambiq_apollo3_blue.dtsi
  8. 18
      dts/arm/ambiq/ambiq_apollo3p_blue.dtsi
  9. 21
      dts/arm/ambiq/ambiq_apollo4p.dtsi
  10. 20
      dts/arm/ambiq/ambiq_apollo4p_blue.dtsi
  11. 2
      dts/bindings/adc/ambiq,adc.yaml
  12. 5
      dts/bindings/i2c/ambiq,i2c.yaml
  13. 5
      dts/bindings/mspi/ambiq,mspi-controller.yaml
  14. 5
      dts/bindings/spi/ambiq,mspi.yaml
  15. 5
      dts/bindings/spi/ambiq,spi-bleif.yaml
  16. 5
      dts/bindings/spi/ambiq,spi.yaml
  17. 2
      dts/bindings/spi/ambiq,spid.yaml
  18. 5
      dts/bindings/usb/ambiq,usb.yaml

14
drivers/adc/adc_ambiq.c
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@ -21,8 +21,6 @@
#include <zephyr/logging/log.h> #include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(adc_ambiq, CONFIG_ADC_LOG_LEVEL); LOG_MODULE_REGISTER(adc_ambiq, CONFIG_ADC_LOG_LEVEL);
typedef int (*ambiq_adc_pwr_func_t)(void);
#define PWRCTRL_MAX_WAIT_US 5
/* Number of slots available. */ /* Number of slots available. */
#define AMBIQ_ADC_SLOT_NUMBER AM_HAL_ADC_MAX_SLOTS #define AMBIQ_ADC_SLOT_NUMBER AM_HAL_ADC_MAX_SLOTS
@ -32,7 +30,6 @@ struct adc_ambiq_config {
uint8_t num_channels; uint8_t num_channels;
void (*irq_config_func)(void); void (*irq_config_func)(void);
const struct pinctrl_dev_config *pin_cfg; const struct pinctrl_dev_config *pin_cfg;
ambiq_adc_pwr_func_t pwr_func;
}; };
struct adc_ambiq_data { struct adc_ambiq_data {
@ -290,7 +287,7 @@ static int adc_ambiq_init(const struct device *dev)
} }
/* power on ADC*/ /* power on ADC*/
ret = cfg->pwr_func(); ret = am_hal_adc_power_control(data->adcHandle, AM_HAL_SYSCTRL_WAKE, false);
/* Set up the ADC configuration parameters. These settings are reasonable /* Set up the ADC configuration parameters. These settings are reasonable
* for accurate measurements at a low sample rate. * for accurate measurements at a low sample rate.
@ -404,14 +401,6 @@ static int adc_ambiq_pm_action(const struct device *dev, enum pm_device_action a
#define ADC_AMBIQ_INIT(n) \ #define ADC_AMBIQ_INIT(n) \
PINCTRL_DT_INST_DEFINE(n); \ PINCTRL_DT_INST_DEFINE(n); \
ADC_AMBIQ_DRIVER_API(n); \ ADC_AMBIQ_DRIVER_API(n); \
static int pwr_on_ambiq_adc_##n(void) \
{ \
uint32_t addr = DT_REG_ADDR(DT_INST_PHANDLE(n, ambiq_pwrcfg)) + \
DT_INST_PHA(n, ambiq_pwrcfg, offset); \
sys_write32((sys_read32(addr) | DT_INST_PHA(n, ambiq_pwrcfg, mask)), addr); \
k_busy_wait(PWRCTRL_MAX_WAIT_US); \
return 0; \
} \
static void adc_irq_config_func_##n(void) \ static void adc_irq_config_func_##n(void) \
{ \ { \
IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), adc_ambiq_isr, \ IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), adc_ambiq_isr, \
@ -429,7 +418,6 @@ static int adc_ambiq_pm_action(const struct device *dev, enum pm_device_action a
.num_channels = DT_PROP(DT_DRV_INST(n), channel_count), \ .num_channels = DT_PROP(DT_DRV_INST(n), channel_count), \
.irq_config_func = adc_irq_config_func_##n, \ .irq_config_func = adc_irq_config_func_##n, \
.pin_cfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \ .pin_cfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
.pwr_func = pwr_on_ambiq_adc_##n, \
}; \ }; \
PM_DEVICE_DT_INST_DEFINE(n, adc_ambiq_pm_action); \ PM_DEVICE_DT_INST_DEFINE(n, adc_ambiq_pm_action); \
DEVICE_DT_INST_DEFINE(n, &adc_ambiq_init, PM_DEVICE_DT_INST_GET(n), &adc_ambiq_data_##n, \ DEVICE_DT_INST_DEFINE(n, &adc_ambiq_init, PM_DEVICE_DT_INST_GET(n), &adc_ambiq_data_##n, \

15
drivers/i2c/i2c_ambiq.c
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@ -43,9 +43,6 @@
LOG_MODULE_REGISTER(ambiq_i2c, CONFIG_I2C_LOG_LEVEL); LOG_MODULE_REGISTER(ambiq_i2c, CONFIG_I2C_LOG_LEVEL);
typedef int (*ambiq_i2c_pwr_func_t)(void);
#define PWRCTRL_MAX_WAIT_US 5
#define I2C_TRANSFER_TIMEOUT_MSEC 500 /* Transfer timeout period */ #define I2C_TRANSFER_TIMEOUT_MSEC 500 /* Transfer timeout period */
#include "i2c-priv.h" #include "i2c-priv.h"
@ -59,7 +56,6 @@ struct i2c_ambiq_config {
int size; int size;
uint32_t bitrate; uint32_t bitrate;
const struct pinctrl_dev_config *pcfg; const struct pinctrl_dev_config *pcfg;
ambiq_i2c_pwr_func_t pwr_func;
void (*irq_config_func)(void); void (*irq_config_func)(void);
}; };
@ -420,7 +416,7 @@ static int i2c_ambiq_init(const struct device *dev)
return -ENXIO; return -ENXIO;
} }
ret = config->pwr_func(); ret = am_hal_iom_power_ctrl(data->iom_handler, AM_HAL_SYSCTRL_WAKE, false);
ret |= i2c_ambiq_configure(dev, I2C_MODE_CONTROLLER | bitrate_cfg); ret |= i2c_ambiq_configure(dev, I2C_MODE_CONTROLLER | bitrate_cfg);
if (ret < 0) { if (ret < 0) {
@ -492,14 +488,6 @@ static int i2c_ambiq_pm_action(const struct device *dev, enum pm_device_action a
#define AMBIQ_I2C_DEFINE(n) \ #define AMBIQ_I2C_DEFINE(n) \
PINCTRL_DT_INST_DEFINE(n); \ PINCTRL_DT_INST_DEFINE(n); \
static int pwr_on_ambiq_i2c_##n(void) \
{ \
uint32_t addr = DT_REG_ADDR(DT_INST_PHANDLE(n, ambiq_pwrcfg)) + \
DT_INST_PHA(n, ambiq_pwrcfg, offset); \
sys_write32((sys_read32(addr) | DT_INST_PHA(n, ambiq_pwrcfg, mask)), addr); \
k_busy_wait(PWRCTRL_MAX_WAIT_US); \
return 0; \
} \
static void i2c_irq_config_func_##n(void) \ static void i2c_irq_config_func_##n(void) \
{ \ { \
IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), i2c_ambiq_isr, \ IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), i2c_ambiq_isr, \
@ -517,7 +505,6 @@ static int i2c_ambiq_pm_action(const struct device *dev, enum pm_device_action a
.bitrate = DT_INST_PROP(n, clock_frequency), \ .bitrate = DT_INST_PROP(n, clock_frequency), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \ .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
.irq_config_func = i2c_irq_config_func_##n, \ .irq_config_func = i2c_irq_config_func_##n, \
.pwr_func = pwr_on_ambiq_i2c_##n, \
IF_ENABLED(CONFIG_I2C_AMBIQ_BUS_RECOVERY, \ IF_ENABLED(CONFIG_I2C_AMBIQ_BUS_RECOVERY, \
(.scl = GPIO_DT_SPEC_INST_GET_OR(n, scl_gpios, {0}),\ (.scl = GPIO_DT_SPEC_INST_GET_OR(n, scl_gpios, {0}),\
.sda = GPIO_DT_SPEC_INST_GET_OR(n, sda_gpios, {0}),)) }; \ .sda = GPIO_DT_SPEC_INST_GET_OR(n, sda_gpios, {0}),)) }; \

2
drivers/serial/uart_pl011_ambiq.h
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@ -15,8 +15,6 @@
#include "uart_pl011_registers.h" #include "uart_pl011_registers.h"
#include <am_mcu_apollo.h> #include <am_mcu_apollo.h>
#define PWRCTRL_MAX_WAIT_US 5
static inline void pl011_ambiq_enable_clk(const struct device *dev) static inline void pl011_ambiq_enable_clk(const struct device *dev)
{ {
get_uart(dev)->cr |= PL011_CR_AMBIQ_CLKEN; get_uart(dev)->cr |= PL011_CR_AMBIQ_CLKEN;

18
drivers/spi/spi_ambiq_bleif.c
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@ -23,15 +23,10 @@ LOG_MODULE_REGISTER(spi_ambiq_bleif);
#include "spi_context.h" #include "spi_context.h"
#include <am_mcu_apollo.h> #include <am_mcu_apollo.h>
#define PWRCTRL_MAX_WAIT_US 5
typedef int (*ambiq_spi_pwr_func_t)(void);
struct spi_ambiq_config { struct spi_ambiq_config {
uint32_t base; uint32_t base;
int size; int size;
const struct pinctrl_dev_config *pcfg; const struct pinctrl_dev_config *pcfg;
ambiq_spi_pwr_func_t pwr_func;
}; };
struct spi_ambiq_data { struct spi_ambiq_data {
@ -190,29 +185,18 @@ static int spi_ambiq_init(const struct device *dev)
return ret; return ret;
} }
ret = cfg->pwr_func();
return ret; return ret;
} }
#define AMBIQ_SPI_BLEIF_INIT(n) \ #define AMBIQ_SPI_BLEIF_INIT(n) \
PINCTRL_DT_INST_DEFINE(n); \ PINCTRL_DT_INST_DEFINE(n); \
static int pwr_on_ambiq_spi_##n(void) \
{ \
uint32_t addr = DT_REG_ADDR(DT_INST_PHANDLE(n, ambiq_pwrcfg)) + \
DT_INST_PHA(n, ambiq_pwrcfg, offset); \
sys_write32((sys_read32(addr) | DT_INST_PHA(n, ambiq_pwrcfg, mask)), addr); \
k_busy_wait(PWRCTRL_MAX_WAIT_US); \
return 0; \
} \
static struct spi_ambiq_data spi_ambiq_data##n = { \ static struct spi_ambiq_data spi_ambiq_data##n = { \
SPI_CONTEXT_INIT_LOCK(spi_ambiq_data##n, ctx), \ SPI_CONTEXT_INIT_LOCK(spi_ambiq_data##n, ctx), \
SPI_CONTEXT_INIT_SYNC(spi_ambiq_data##n, ctx)}; \ SPI_CONTEXT_INIT_SYNC(spi_ambiq_data##n, ctx)}; \
static const struct spi_ambiq_config spi_ambiq_config##n = { \ static const struct spi_ambiq_config spi_ambiq_config##n = { \
.base = DT_INST_REG_ADDR(n), \ .base = DT_INST_REG_ADDR(n), \
.size = DT_INST_REG_SIZE(n), \ .size = DT_INST_REG_SIZE(n), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \ .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n)}; \
.pwr_func = pwr_on_ambiq_spi_##n}; \
SPI_DEVICE_DT_INST_DEFINE(n, spi_ambiq_init, NULL, &spi_ambiq_data##n, \ SPI_DEVICE_DT_INST_DEFINE(n, spi_ambiq_init, NULL, &spi_ambiq_data##n, \
&spi_ambiq_config##n, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \ &spi_ambiq_config##n, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \
&spi_ambiq_driver_api); &spi_ambiq_driver_api);

18
drivers/spi/spi_ambiq_spic.c
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@ -41,16 +41,11 @@ LOG_MODULE_REGISTER(spi_ambiq);
#define SPI_AMBIQ_MANUAL_CACHE_COHERENCY_REQUIRED 0 #define SPI_AMBIQ_MANUAL_CACHE_COHERENCY_REQUIRED 0
#endif /* defined(CONFIG_DCACHE) && !defined(CONFIG_NOCACHE_MEMORY) */ #endif /* defined(CONFIG_DCACHE) && !defined(CONFIG_NOCACHE_MEMORY) */
#define PWRCTRL_MAX_WAIT_US 5
typedef int (*ambiq_spi_pwr_func_t)(void);
struct spi_ambiq_config { struct spi_ambiq_config {
uint32_t base; uint32_t base;
int size; int size;
uint32_t clock_freq; uint32_t clock_freq;
const struct pinctrl_dev_config *pcfg; const struct pinctrl_dev_config *pcfg;
ambiq_spi_pwr_func_t pwr_func;
void (*irq_config_func)(void); void (*irq_config_func)(void);
}; };
@ -517,7 +512,7 @@ static int spi_ambiq_init(const struct device *dev)
return -ENXIO; return -ENXIO;
} }
ret = cfg->pwr_func(); ret = am_hal_iom_power_ctrl(data->iom_handler, AM_HAL_SYSCTRL_WAKE, false);
ret |= pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT); ret |= pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);
ret |= spi_context_cs_configure_all(&data->ctx); ret |= spi_context_cs_configure_all(&data->ctx);
@ -571,14 +566,6 @@ static int spi_ambiq_pm_action(const struct device *dev, enum pm_device_action a
#define AMBIQ_SPI_INIT(n) \ #define AMBIQ_SPI_INIT(n) \
PINCTRL_DT_INST_DEFINE(n); \ PINCTRL_DT_INST_DEFINE(n); \
static int pwr_on_ambiq_spi_##n(void) \
{ \
uint32_t addr = DT_REG_ADDR(DT_INST_PHANDLE(n, ambiq_pwrcfg)) + \
DT_INST_PHA(n, ambiq_pwrcfg, offset); \
sys_write32((sys_read32(addr) | DT_INST_PHA(n, ambiq_pwrcfg, mask)), addr); \
k_busy_wait(PWRCTRL_MAX_WAIT_US); \
return 0; \
} \
static void spi_irq_config_func_##n(void) \ static void spi_irq_config_func_##n(void) \
{ \ { \
IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), spi_ambiq_isr, \ IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), spi_ambiq_isr, \
@ -594,8 +581,7 @@ static int spi_ambiq_pm_action(const struct device *dev, enum pm_device_action a
.size = DT_INST_REG_SIZE(n), \ .size = DT_INST_REG_SIZE(n), \
.clock_freq = DT_INST_PROP(n, clock_frequency), \ .clock_freq = DT_INST_PROP(n, clock_frequency), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \ .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
.irq_config_func = spi_irq_config_func_##n, \ .irq_config_func = spi_irq_config_func_##n}; \
.pwr_func = pwr_on_ambiq_spi_##n}; \
PM_DEVICE_DT_INST_DEFINE(n, spi_ambiq_pm_action); \ PM_DEVICE_DT_INST_DEFINE(n, spi_ambiq_pm_action); \
SPI_DEVICE_DT_INST_DEFINE(n, spi_ambiq_init, PM_DEVICE_DT_INST_GET(n), &spi_ambiq_data##n, \ SPI_DEVICE_DT_INST_DEFINE(n, spi_ambiq_init, PM_DEVICE_DT_INST_GET(n), &spi_ambiq_data##n, \
&spi_ambiq_config##n, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \ &spi_ambiq_config##n, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \

18
drivers/spi/spi_ambiq_spid.c
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@ -22,16 +22,11 @@ LOG_MODULE_REGISTER(spi_ambiq_spid);
#include "spi_context.h" #include "spi_context.h"
#include <am_mcu_apollo.h> #include <am_mcu_apollo.h>
#define AMBIQ_SPID_PWRCTRL_MAX_WAIT_US 5
typedef int (*ambiq_spi_pwr_func_t)(void);
struct spi_ambiq_config { struct spi_ambiq_config {
const struct gpio_dt_spec int_gpios; const struct gpio_dt_spec int_gpios;
uint32_t base; uint32_t base;
int size; int size;
const struct pinctrl_dev_config *pcfg; const struct pinctrl_dev_config *pcfg;
ambiq_spi_pwr_func_t pwr_func;
void (*irq_config_func)(void); void (*irq_config_func)(void);
}; };
@ -342,7 +337,7 @@ static int spi_ambiq_init(const struct device *dev)
return -ENXIO; return -ENXIO;
} }
ret = cfg->pwr_func(); ret = am_hal_ios_power_ctrl(data->ios_handler, AM_HAL_SYSCTRL_WAKE, false);
ret |= pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT); ret |= pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);
if (ret < 0) { if (ret < 0) {
@ -396,14 +391,6 @@ static int spi_ambiq_pm_action(const struct device *dev, enum pm_device_action a
#define AMBIQ_SPID_INIT(n) \ #define AMBIQ_SPID_INIT(n) \
PINCTRL_DT_INST_DEFINE(n); \ PINCTRL_DT_INST_DEFINE(n); \
static int pwr_on_ambiq_spi_##n(void) \
{ \
uint32_t addr = DT_REG_ADDR(DT_INST_PHANDLE(n, ambiq_pwrcfg)) + \
DT_INST_PHA(n, ambiq_pwrcfg, offset); \
sys_write32((sys_read32(addr) | DT_INST_PHA(n, ambiq_pwrcfg, mask)), addr); \
k_busy_wait(AMBIQ_SPID_PWRCTRL_MAX_WAIT_US); \
return 0; \
} \
static void spi_irq_config_func_##n(void) \ static void spi_irq_config_func_##n(void) \
{ \ { \
IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), spi_ambiq_isr, \ IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), spi_ambiq_isr, \
@ -420,8 +407,7 @@ static int spi_ambiq_pm_action(const struct device *dev, enum pm_device_action a
.base = DT_INST_REG_ADDR(n), \ .base = DT_INST_REG_ADDR(n), \
.size = DT_INST_REG_SIZE(n), \ .size = DT_INST_REG_SIZE(n), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \ .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
.irq_config_func = spi_irq_config_func_##n, \ .irq_config_func = spi_irq_config_func_##n}; \
.pwr_func = pwr_on_ambiq_spi_##n}; \
PM_DEVICE_DT_INST_DEFINE(n, spi_ambiq_pm_action); \ PM_DEVICE_DT_INST_DEFINE(n, spi_ambiq_pm_action); \
SPI_DEVICE_DT_INST_DEFINE(n, spi_ambiq_init, PM_DEVICE_DT_INST_GET(n), &spi_ambiq_data##n, \ SPI_DEVICE_DT_INST_DEFINE(n, spi_ambiq_init, PM_DEVICE_DT_INST_GET(n), &spi_ambiq_data##n, \
&spi_ambiq_config##n, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \ &spi_ambiq_config##n, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \

16
dts/arm/ambiq/ambiq_apollo3_blue.dtsi
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@ -204,7 +204,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <4 0>; interrupts = <4 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -215,7 +214,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <6 0>; interrupts = <6 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x2>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -226,7 +224,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <7 0>; interrupts = <7 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x4>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -237,7 +234,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <8 0>; interrupts = <8 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x8>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -248,7 +244,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <9 0>; interrupts = <9 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x10>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -259,7 +254,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <10 0>; interrupts = <10 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x20>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -270,7 +264,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <11 0>; interrupts = <11 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x40>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -281,7 +274,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <6 0>; interrupts = <6 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x2>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -292,7 +284,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <7 0>; interrupts = <7 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x4>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -303,7 +294,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <8 0>; interrupts = <8 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x8>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -314,7 +304,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <9 0>; interrupts = <9 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x10>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -325,7 +314,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <10 0>; interrupts = <10 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x20>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -336,7 +324,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <11 0>; interrupts = <11 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x40>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -349,7 +336,6 @@
internal-vref-mv = <1500>; internal-vref-mv = <1500>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
ambiq,pwrcfg = <&pwrcfg 0x8 0x200>;
}; };
mspi0: spi@40020000 { mspi0: spi@40020000 {
@ -359,7 +345,6 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x800>;
}; };
rtc0: rtc@40004240 { rtc0: rtc@40004240 {
@ -377,7 +362,6 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x8000>;
bt_hci_apollo: bt-hci@0 { bt_hci_apollo: bt-hci@0 {
compatible = "ambiq,bt-hci-spi"; compatible = "ambiq,bt-hci-spi";

18
dts/arm/ambiq/ambiq_apollo3p_blue.dtsi
Unescape View File

@ -222,7 +222,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <4 0>; interrupts = <4 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -233,7 +232,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <6 0>; interrupts = <6 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x2>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -244,7 +242,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <7 0>; interrupts = <7 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x4>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -255,7 +252,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <8 0>; interrupts = <8 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x8>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -266,7 +262,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <9 0>; interrupts = <9 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x10>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -277,7 +272,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <10 0>; interrupts = <10 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x20>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -288,7 +282,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <11 0>; interrupts = <11 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x40>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -299,7 +292,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <6 0>; interrupts = <6 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x2>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -310,7 +302,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <7 0>; interrupts = <7 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x4>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -321,7 +312,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <8 0>; interrupts = <8 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x8>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -332,7 +322,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <9 0>; interrupts = <9 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x10>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -343,7 +332,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <10 0>; interrupts = <10 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x20>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -354,7 +342,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <11 0>; interrupts = <11 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x40>;
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
@ -367,7 +354,6 @@
internal-vref-mv = <1500>; internal-vref-mv = <1500>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
ambiq,pwrcfg = <&pwrcfg 0x8 0x200>;
}; };
mspi0: mspi@50014000 { mspi0: mspi@50014000 {
@ -378,7 +364,6 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x800>;
}; };
mspi1: mspi@50015000 { mspi1: mspi@50015000 {
@ -389,7 +374,6 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x1000>;
}; };
mspi2: mspi@50016000 { mspi2: mspi@50016000 {
@ -400,7 +384,6 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x2000>;
}; };
rtc0: rtc@40004240 { rtc0: rtc@40004240 {
@ -418,7 +401,6 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x8 0x8000>;
bt_hci_apollo: bt-hci@0 { bt_hci_apollo: bt-hci@0 {
compatible = "ambiq,bt-hci-spi"; compatible = "ambiq,bt-hci-spi";

21
dts/arm/ambiq/ambiq_apollo4p.dtsi
Unescape View File

@ -160,7 +160,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <6 0>; interrupts = <6 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x2>;
}; };
iom0_i2c: i2c@40050000 { iom0_i2c: i2c@40050000 {
@ -170,7 +169,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <6 0>; interrupts = <6 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x2>;
}; };
iom1_spi: spi@40051000 { iom1_spi: spi@40051000 {
@ -180,7 +178,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <7 0>; interrupts = <7 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x4>;
}; };
iom1_i2c: i2c@40051000 { iom1_i2c: i2c@40051000 {
@ -190,7 +187,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <7 0>; interrupts = <7 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x4>;
}; };
iom2_spi: spi@40052000 { iom2_spi: spi@40052000 {
@ -200,7 +196,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <8 0>; interrupts = <8 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x8>;
}; };
iom2_i2c: i2c@40052000 { iom2_i2c: i2c@40052000 {
@ -210,7 +205,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <8 0>; interrupts = <8 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x8>;
}; };
iom3_spi: spi@40053000 { iom3_spi: spi@40053000 {
@ -220,7 +214,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <9 0>; interrupts = <9 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x10>;
}; };
iom3_i2c: i2c@40053000 { iom3_i2c: i2c@40053000 {
@ -230,7 +223,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <9 0>; interrupts = <9 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x10>;
}; };
iom4_spi: spi@40054000 { iom4_spi: spi@40054000 {
@ -240,7 +232,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <10 0>; interrupts = <10 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x20>;
}; };
iom4_i2c: i2c@40054000 { iom4_i2c: i2c@40054000 {
@ -250,7 +241,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <10 0>; interrupts = <10 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x20>;
}; };
iom5_spi: spi@40055000 { iom5_spi: spi@40055000 {
@ -260,7 +250,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <11 0>; interrupts = <11 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x40>;
}; };
iom5_i2c: i2c@40055000 { iom5_i2c: i2c@40055000 {
@ -270,7 +259,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <11 0>; interrupts = <11 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x40>;
}; };
iom6_spi: spi@40056000 { iom6_spi: spi@40056000 {
@ -280,7 +268,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <12 0>; interrupts = <12 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x80>;
}; };
iom6_i2c: i2c@40056000 { iom6_i2c: i2c@40056000 {
@ -290,7 +277,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <12 0>; interrupts = <12 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x80>;
}; };
iom7_spi: spi@40057000 { iom7_spi: spi@40057000 {
@ -300,7 +286,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <13 0>; interrupts = <13 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x100>;
}; };
iom7_i2c: i2c@40057000 { iom7_i2c: i2c@40057000 {
@ -310,7 +295,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <13 0>; interrupts = <13 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x100>;
}; };
adc0: adc@40038000 { adc0: adc@40038000 {
@ -322,7 +306,6 @@
internal-vref-mv = <1190>; internal-vref-mv = <1190>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
ambiq,pwrcfg = <&pwrcfg 0x4 0x2000>;
}; };
mspi0: spi@40060000 { mspi0: spi@40060000 {
@ -332,7 +315,6 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x4000>;
}; };
mspi1: spi@40061000 { mspi1: spi@40061000 {
@ -342,7 +324,6 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x8000>;
}; };
mspi2: spi@40062000 { mspi2: spi@40062000 {
@ -352,7 +333,6 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x10000>;
}; };
rtc0: rtc@40004800 { rtc0: rtc@40004800 {
@ -370,7 +350,6 @@
num-bidir-endpoints = <6>; num-bidir-endpoints = <6>;
maximum-speed = "full-speed"; maximum-speed = "full-speed";
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x400000>;
}; };
pinctrl: pin-controller@40010000 { pinctrl: pin-controller@40010000 {

20
dts/arm/ambiq/ambiq_apollo4p_blue.dtsi
Unescape View File

@ -141,7 +141,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <6 0>; interrupts = <6 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x2>;
}; };
spi1: spi@40051000 { spi1: spi@40051000 {
@ -151,7 +150,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <7 0>; interrupts = <7 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x4>;
}; };
spi2: spi@40052000 { spi2: spi@40052000 {
@ -161,7 +159,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <8 0>; interrupts = <8 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x8>;
}; };
spi3: spi@40053000 { spi3: spi@40053000 {
@ -171,7 +168,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <9 0>; interrupts = <9 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x10>;
}; };
spi4: spi@40054000 { spi4: spi@40054000 {
@ -184,7 +180,6 @@
cs-gpios = <&gpio32_63 22 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; cs-gpios = <&gpio32_63 22 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
clock-frequency = <DT_FREQ_M(24)>; clock-frequency = <DT_FREQ_M(24)>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x20>;
bt_hci_apollo: bt-hci@0 { bt_hci_apollo: bt-hci@0 {
compatible = "ambiq,bt-hci-spi"; compatible = "ambiq,bt-hci-spi";
@ -203,7 +198,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <11 0>; interrupts = <11 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x40>;
}; };
spi6: spi@40056000 { spi6: spi@40056000 {
@ -213,7 +207,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <12 0>; interrupts = <12 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x80>;
}; };
spi7: spi@40057000 { spi7: spi@40057000 {
@ -223,7 +216,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <13 0>; interrupts = <13 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x100>;
}; };
i2c0: i2c@40050000 { i2c0: i2c@40050000 {
@ -233,7 +225,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <6 0>; interrupts = <6 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x2>;
}; };
i2c1: i2c@40051000 { i2c1: i2c@40051000 {
@ -243,7 +234,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <7 0>; interrupts = <7 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x4>;
}; };
i2c2: i2c@40052000 { i2c2: i2c@40052000 {
@ -253,7 +243,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <8 0>; interrupts = <8 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x8>;
}; };
i2c3: i2c@40053000 { i2c3: i2c@40053000 {
@ -263,7 +252,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <9 0>; interrupts = <9 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x10>;
}; };
i2c4: i2c@40054000 { i2c4: i2c@40054000 {
@ -273,7 +261,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <10 0>; interrupts = <10 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x20>;
}; };
i2c5: i2c@40055000 { i2c5: i2c@40055000 {
@ -283,7 +270,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <11 0>; interrupts = <11 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x40>;
}; };
i2c6: i2c@40056000 { i2c6: i2c@40056000 {
@ -293,7 +279,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <12 0>; interrupts = <12 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x80>;
}; };
i2c7: i2c@40057000 { i2c7: i2c@40057000 {
@ -303,7 +288,6 @@
#size-cells = <0>; #size-cells = <0>;
interrupts = <13 0>; interrupts = <13 0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x100>;
}; };
mspi0: spi@40060000 { mspi0: spi@40060000 {
@ -313,7 +297,6 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x4000>;
}; };
mspi1: spi@40061000 { mspi1: spi@40061000 {
@ -323,7 +306,6 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x8000>;
}; };
mspi2: spi@40062000 { mspi2: spi@40062000 {
@ -333,7 +315,6 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x10000>;
}; };
usb: usb@400b0000 { usb: usb@400b0000 {
@ -343,7 +324,6 @@
num-bidir-endpoints = <6>; num-bidir-endpoints = <6>;
maximum-speed = "full-speed"; maximum-speed = "full-speed";
status = "disabled"; status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x400000>;
}; };
rtc0: rtc@40004800 { rtc0: rtc@40004800 {

2
dts/bindings/adc/ambiq,adc.yaml
Unescape View File

@ -5,7 +5,7 @@ description: Ambiq ADC node
compatible: "ambiq,adc" compatible: "ambiq,adc"
include: [adc-controller.yaml, pinctrl-device.yaml, ambiq-pwrcfg.yaml] include: [adc-controller.yaml, pinctrl-device.yaml]
properties: properties:
reg: reg:
required: true required: true

5
dts/bindings/i2c/ambiq,i2c.yaml
Unescape View File

@ -5,7 +5,7 @@ description: Ambiq I2C
compatible: "ambiq,i2c" compatible: "ambiq,i2c"
include: [i2c-controller.yaml, pinctrl-device.yaml, ambiq-pwrcfg.yaml] include: [i2c-controller.yaml, pinctrl-device.yaml]
properties: properties:
reg: reg:
@ -14,9 +14,6 @@ properties:
interrupts: interrupts:
required: true required: true
ambiq,pwrcfg:
required: true
scl-gpios: scl-gpios:
type: phandle-array type: phandle-array
description: | description: |

5
dts/bindings/mspi/ambiq,mspi-controller.yaml
Unescape View File

@ -5,7 +5,7 @@ description: Ambiq MSPI controller
compatible: "ambiq,mspi-controller" compatible: "ambiq,mspi-controller"
include: [mspi-controller.yaml, pinctrl-device.yaml, ambiq-pwrcfg.yaml] include: [mspi-controller.yaml, pinctrl-device.yaml]
properties: properties:
reg: reg:
@ -14,9 +14,6 @@ properties:
interrupts: interrupts:
required: true required: true
ambiq,pwrcfg:
required: true
ce-gpios: ce-gpios:
required: true required: true

5
dts/bindings/spi/ambiq,mspi.yaml
Unescape View File

@ -5,7 +5,7 @@ description: Ambiq MSPI
compatible: "ambiq,mspi" compatible: "ambiq,mspi"
include: [spi-controller.yaml, pinctrl-device.yaml, ambiq-pwrcfg.yaml] include: [spi-controller.yaml, pinctrl-device.yaml]
properties: properties:
reg: reg:
@ -13,6 +13,3 @@ properties:
interrupts: interrupts:
required: true required: true
ambiq,pwrcfg:
required: true

5
dts/bindings/spi/ambiq,spi-bleif.yaml
Unescape View File

@ -8,11 +8,8 @@ description: |
compatible: "ambiq,spi-bleif" compatible: "ambiq,spi-bleif"
include: [spi-controller.yaml, pinctrl-device.yaml, ambiq-pwrcfg.yaml] include: [spi-controller.yaml, pinctrl-device.yaml]
properties: properties:
reg: reg:
required: true required: true
ambiq,pwrcfg:
required: true

5
dts/bindings/spi/ambiq,spi.yaml
Unescape View File

@ -5,7 +5,7 @@ description: Ambiq SPI
compatible: "ambiq,spi" compatible: "ambiq,spi"
include: [spi-controller.yaml, pinctrl-device.yaml, ambiq-pwrcfg.yaml] include: [spi-controller.yaml, pinctrl-device.yaml]
properties: properties:
reg: reg:
@ -16,6 +16,3 @@ properties:
clock-frequency: clock-frequency:
required: true required: true
ambiq,pwrcfg:
required: true

2
dts/bindings/spi/ambiq,spid.yaml
Unescape View File

@ -5,7 +5,7 @@ description: Ambiq SPI Device
compatible: "ambiq,spid" compatible: "ambiq,spid"
include: [spi-controller.yaml, pinctrl-device.yaml, ambiq-pwrcfg.yaml] include: [spi-controller.yaml, pinctrl-device.yaml]
properties: properties:
int-gpios: int-gpios:

5
dts/bindings/usb/ambiq,usb.yaml
Unescape View File

@ -5,7 +5,7 @@ description: Ambiq USB
compatible: "ambiq,usb" compatible: "ambiq,usb"
include: [usb-ep.yaml, pinctrl-device.yaml, ambiq-pwrcfg.yaml] include: [usb-ep.yaml, pinctrl-device.yaml]
properties: properties:
reg: reg:
@ -14,9 +14,6 @@ properties:
interrupts: interrupts:
required: true required: true
ambiq,pwrcfg:
required: true
vddusb33-gpios: vddusb33-gpios:
type: phandle-array type: phandle-array
description: | description: |

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