soc: neorv32: list NEORV32 v1.11.6 as currently supported version

List NEORV32 v1.11.6 as the currently supported version. No changes to the
in-tree drivers needed for the changes between v1.11.3 and v1.11.6.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>

boards/others/neorv32/doc/index.rst

@@ -13,7 +13,7 @@ For more information about the NEORV32, see the following websites:
 - `The NEORV32 RISC-V Processor Datasheet`_
 - `The NEORV32 RISC-V Processor User Guide`_
 
-The currently supported version is NEORV32 v1.11.3.
+The currently supported version is NEORV32 v1.11.6.
 
 Supported Board Targets
 =======================

doc/releases/migration-guide-4.2.rst

@@ -58,7 +58,7 @@ Boards
 * The DT binding :dtcompatible:`zephyr,native-posix-cpu` has been deprecated in favor of
   :dtcompatible:`zephyr,native-sim-cpu`.
 
-* Zephyr now supports version 1.11.3 of the :zephyr:board:`neorv32`. NEORV32 processor (SoC)
+* Zephyr now supports version 1.11.6 of the :zephyr:board:`neorv32`. NEORV32 processor (SoC)
   implementations need to be updated to this version to be compatible with Zephyr v4.2.0.
 
 * The :zephyr:board:`neorv32` now targets NEORV32 processor (SoC) templates via board variants. The

soc/neorv32/Kconfig

@@ -13,7 +13,7 @@ if SOC_NEORV32
 
 config SOC_NEORV32_VERSION
 	hex
-	default 0x01110300
+	default 0x01110600
 	help
 	  The targeted NEORV32 version as BCD-coded number. The format is
 	  identical to that of the NEORV32 Machine implementation ID (mimpid)

soc/neorv32/soc.h

@@ -22,12 +22,11 @@
 /* System information (SYSINFO) SOC register bits */
 #define NEORV32_SYSINFO_SOC_BOOTLOADER    BIT(0)
 #define NEORV32_SYSINFO_SOC_XBUS          BIT(1)
-#define NEORV32_SYSINFO_SOC_MEM_INT_IMEM  BIT(2)
-#define NEORV32_SYSINFO_SOC_MEM_INT_DMEM  BIT(3)
+#define NEORV32_SYSINFO_SOC_IMEM          BIT(2)
+#define NEORV32_SYSINFO_SOC_DMEM          BIT(3)
 #define NEORV32_SYSINFO_SOC_OCD           BIT(4)
 #define NEORV32_SYSINFO_SOC_ICACHE        BIT(5)
 #define NEORV32_SYSINFO_SOC_DCACHE        BIT(6)
-#define NEORV32_SYSINFO_SOC_XBUS_CACHE    BIT(8)
 #define NEORV32_SYSINFO_SOC_OCD_AUTH      BIT(11)
 #define NEORV32_SYSINFO_SOC_IMEM_ROM      BIT(12)
 #define NEORV32_SYSINFO_SOC_IO_TWD        BIT(13)
@@ -44,18 +43,14 @@
 #define NEORV32_SYSINFO_SOC_IO_SDI        BIT(24)
 #define NEORV32_SYSINFO_SOC_IO_UART1      BIT(25)
 #define NEORV32_SYSINFO_SOC_IO_NEOLED     BIT(26)
-#define NEORV32_SYSINFO_SOC_IO_HWSPINLOCK BIT(27)
 #define NEORV32_SYSINFO_SOC_IO_GPTMR      BIT(28)
 #define NEORV32_SYSINFO_SOC_IO_SLINK      BIT(29)
 #define NEORV32_SYSINFO_SOC_IO_ONEWIRE    BIT(30)
-#define NEORV32_SYSINFO_SOC_IO_CRC        BIT(31)
 
 /* System information (SYSINFO) CACHE register bits */
 #define NEORV32_SYSINFO_CACHE_INST_BLOCK_SIZE GENMASK(3, 0)
 #define NEORV32_SYSINFO_CACHE_INST_NUM_BLOCKS GENMASK(7, 4)
 #define NEORV32_SYSINFO_CACHE_DATA_BLOCK_SIZE GENMASK(11, 8)
 #define NEORV32_SYSINFO_CACHE_DATA_NUM_BLOCKS GENMASK(15, 12)
-#define NEORV32_SYSINFO_CACHE_XBUS_BLOCK_SIZE GENMASK(27, 24)
-#define NEORV32_SYSINFO_CACHE_XBUS_NUM_BLOCKS GENMASK(31, 28)
 
 #endif /* _NEORV32_SOC_H */