diff --git a/boards/variscite/imx93_var_som/Kconfig.imx93_var_som b/boards/variscite/imx93_var_som/Kconfig.imx93_var_som new file mode 100644 index 00000000000..a5c59b8bf5e --- /dev/null +++ b/boards/variscite/imx93_var_som/Kconfig.imx93_var_som @@ -0,0 +1,8 @@ +# Copyright 2025 Variscite Ltd. +# Copyright 2022,2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_IMX93_VAR_SOM + select SOC_MIMX9352_A55 if BOARD_IMX93_VAR_SOM_MIMX9352_A55 + select SOC_MIMX9352_M33 if BOARD_IMX93_VAR_SOM_MIMX9352_M33 + select SOC_PART_NUMBER_MIMX9352DVVXM diff --git a/boards/variscite/imx93_var_som/board.cmake b/boards/variscite/imx93_var_som/board.cmake new file mode 100644 index 00000000000..4b24b088ce6 --- /dev/null +++ b/boards/variscite/imx93_var_som/board.cmake @@ -0,0 +1,10 @@ +# Copyright 2025 Variscite Ltd. +# SPDX-License-Identifier: Apache-2.0 + +if(CONFIG_SOC_MIMX9352_M33) + board_set_debugger_ifnset(jlink) + board_set_flasher_ifnset(jlink) + + board_runner_args(jlink "--device=MIMX9352_M33") + include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) +endif() diff --git a/boards/variscite/imx93_var_som/board.yml b/boards/variscite/imx93_var_som/board.yml new file mode 100644 index 00000000000..4ee70a3664c --- /dev/null +++ b/boards/variscite/imx93_var_som/board.yml @@ -0,0 +1,6 @@ +boards: + - name: imx93_var_som + full_name: VAR-SOM-MX93 + vendor: variscite + socs: + - name: mimx9352 diff --git a/boards/variscite/imx93_var_som/doc/imx93_var_som.webp b/boards/variscite/imx93_var_som/doc/imx93_var_som.webp new file mode 100644 index 00000000000..cc7a3f8fe06 Binary files /dev/null and b/boards/variscite/imx93_var_som/doc/imx93_var_som.webp differ diff --git a/boards/variscite/imx93_var_som/doc/index.rst b/boards/variscite/imx93_var_som/doc/index.rst new file mode 100644 index 00000000000..fc9430615a3 --- /dev/null +++ b/boards/variscite/imx93_var_som/doc/index.rst @@ -0,0 +1,214 @@ +.. zephyr:board:: imx93_var_som + +Overview +******** + +The VAR-SOM-MX93 offers a high-performance processing for a low-power System-on-Module. +The product is based on the i.MX 93 family which represents NXP’s latest power-optimized +processors for smart home, building control, contactless HMI, IoT edge, and Industrial +applications. + +The i.MX 93 includes powerful dual Arm® Cortex®-A55 processors with speeds up to 1.7 GHz +integrated with a NPU that accelerates machine learning inference. A general-purpose Arm® +Cortex®-M33 running up to 250 MHz is for real-time and low-power processing. Robust control +networks are possible via CAN-FD interface. Also, dual 1 Gbps Ethernet controllers, one +supporting Time Sensitive Networking (TSN), drive gateway applications with low latency. + +Zephyr OS is ported to run on either the Cortex®-A55 or the Cortex®-M33. + +Specs Summary +************* + + - CPU + + - NXP i.MX 93: + - 2x Cortex®-A55 @ 1.7GHz + - 1x Cortex®-M33 @ 250 MHz + - 1x Ethos-U65 microNPU 0.5 TOPS + - Memory + + - Up to 2GB LPDDR4 RAM + - GPU + + - PXP 2D Pixel acceleration engine + - NPU (Neural Processing Unit) + + - Neural Network performance (256 MACs operating up to 1.0 GHz and 2 OPS/MAC) + - NPU targets 8-bit and 16-bit integer RNN + - Handles 8-bit weights + - Display + + - LVDS up to 1366x768p60 or 1280x800p60 + - Parallel RGB up to 1366x768p60 or 1280x800p60 + - 1x MIPI DSI up to 1920x1200p60 24-bit + - Network + + - 2x 10/100/1000 Mbit/s Ethernet Interface + - Certified Wi-Fi 802.11ax/ac/a/b/g/n + - Bluetooth/BLE 5.4 + - Camera + + - One 2-lane MIPI CSI-2 camera input + - Audio + + - Headphones + - Microphone: Digital, Analog (stereo) + - 3x I2S(SAI), S/PDIF, PDM 4CH + - USB + + - 2x USB 2.0 OTG + - Serial interfaces + + - SPI: x7 + - I2C: x7 + - UART: x7, up to 5 Mbps + - CAN: x2 + - Temperature range + + - -40°C to 85°C + +More information about the SoM can be found at the +`Variscite Wiki`_ and +`Variscite website`_. + +Supported Features +****************** + +.. zephyr:board-supported-hw:: + +.. note:: + + It is recommended to disable peripherals used by the M33 core on the Linux host. + +Devices +======== +System Clock +------------ + +This board configuration uses a system clock frequency of 24 MHz. +Cortex-A55 Core runs up to 1.7 GHz. +Cortex-M33 Core runs up to 200MHz in which SYSTICK runs on same frequency. + +Serial Port +----------- + +This board configuration uses a single serial communication channel with the +CPU's UART7 for A55 core and M33 core. + +Programming and Debugging (A55) +******************************* + +Copy the compiled ``zephyr.bin`` to the boot directory of the SD card and +plug the SD card into the board. Power it up and stop the U-Boot execution at +prompt. + +Use U-Boot to load and run zephyr.bin on the Cortex-A55: + +.. code-block:: console + + load mmc $mmcdev:$mmcpart $loadaddr /boot/zephyr.bin + dcache off; icache flush; go $loadaddr + +Use this configuration to run basic Zephyr applications and kernel tests, +for example, with the :zephyr:code-sample:`hello_world` sample: + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :host-os: unix + :board: imx93_var_som/mimx9352/a55 + :goals: build + +This will build an image with the hello_world sample app. When loaded and executed +it will display the following ram console output: + +.. code-block:: console + + *** Booting Zephyr OS build v4.0.0-45-gf012a8b9f506 *** + Hello World! imx93_var_som/mimx9352/a55 + + +Programming and Debugging (M33) +******************************* + +.. zephyr:board-supported-runners:: + +There are two methods to load M33 Core images: U-Boot command and Linux remoteproc. + +Load and Run M33 Zephyr Image from U-Boot +========================================= + +Load and run Zephyr on M33 from A55 using U-Boot by copying the compiled +``zephyr.bin`` to the boot directory of the SD card and plug the SD +card into the board. Power it up and stop the U-Boot execution at prompt. + +Load the M33 binary onto the desired memory and start its execution using: + +.. code-block:: console + + load mmc $mmcdev:$mmcpart 0x80000000 /boot/zephyr.bin + cp.b 0x80000000 0x201e0000 0x30000 + bootaux 0x1ffe0000 0 + +Load and Run M33 Zephyr Image by using Linux remoteproc +======================================================= + +Transfer built binaries ``zephyr.bin`` and ``zephyr.elf`` to the SoM's ``/boot`` and +``/lib/firmware`` respectively using ``scp`` or through an USB drive. + +Before running Cortex-M33 binaries from Linux it is necessary to enable the device tree +dedicated to be used with Cortex-M33 applications: + +.. code-block:: console + + root@imx93-var-som:~# fw_setenv fdt_file imx93-var-som-symphony-m33.dtb + root@imx93-var-som:~# reboot + +It is possible to execute Zephyr binaries using Variscite remoteproc scripts made +for MCUXpresso binaries: + +.. code-block:: console + + root@imx93-var-som:~# /etc/remoteproc/variscite-rproc-linux -f /lib/firmware/zephyr.elf + [ 44.366948] remoteproc remoteproc0: powering up imx-rproc + [ 44.374250] remoteproc remoteproc0: Booting fw image zephyr.elf, size 469352 + [ 44.383338] remoteproc remoteproc0: No resource table in elf + [ 44.904615] remoteproc remoteproc0: remote processor imx-rproc is now up + +Which should yield the following result on the UART7 serial console: + +.. code-block:: console + + *** Booting Zephyr OS build v4.0.0-44-g93cbaccbbc41 *** + Hello World! imx93_var_som/mimx9352/m33 + +You can also configure U-Boot to load firmware on boot: + +.. code-block:: console + + root@imx93-var-som:~# /etc/remoteproc/variscite-rproc-u-boot -f /boot/zephyr.bin + Configuring for TCM memory + + fw_setenv m33_addr 0x201E0000 + + fw_setenv fdt_file imx93-var-som-symphony-m33.dtb + + fw_setenv use_m33 yes + + fw_setenv m33_bin zephyr.bin + + Finished: Please reboot, the m33 firmware will run during U-Boot + +For more information about Variscite remoteproc scripts and general Cortex-M33 +support, visit `Variscite Wiki`_. + +References +********** + +- `Variscite Wiki`_ +- `Variscite website`_ +- `NXP website`_ + +.. _Variscite Wiki: + https://variwiki.com/index.php?title=VAR-SOM-MX93 + +.. _Variscite website: + https://www.variscite.com/product/system-on-module-som/cortex-a55/var-som-mx93-nxp-i-mx-93/ + +.. _NXP website: + https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-9-processors/i-mx-93-applications-processor-family-arm-cortex-a55-ml-acceleration-power-efficient-mpu:i.MX93 diff --git a/boards/variscite/imx93_var_som/imx93_var_som-m33-common.dtsi b/boards/variscite/imx93_var_som/imx93_var_som-m33-common.dtsi new file mode 100644 index 00000000000..fa7014d0613 --- /dev/null +++ b/boards/variscite/imx93_var_som/imx93_var_som-m33-common.dtsi @@ -0,0 +1,19 @@ +/* + * Copyright 2025 Variscite Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + lpuart7: serial@42690000 { + compatible = "nxp,imx-lpuart", "nxp,lpuart"; + reg = <0x42690000 DT_SIZE_K(64)>; + interrupts = <20 3>; + clocks = <&ccm IMX_CCM_LPUART7_CLK 0x6c 24>; + status = "disabled"; + }; + }; +}; diff --git a/boards/variscite/imx93_var_som/imx93_var_som-pinctrl.dtsi b/boards/variscite/imx93_var_som/imx93_var_som-pinctrl.dtsi new file mode 100644 index 00000000000..8d7f8ed5946 --- /dev/null +++ b/boards/variscite/imx93_var_som/imx93_var_som-pinctrl.dtsi @@ -0,0 +1,30 @@ +/* + * Copyright 2025 Variscite Ltd. + * Copyright 2022,2024 NXP + * SPDX-License-Identifier: Apache-2.0 + * + */ + +#include + +&pinctrl { + uart1_default: uart1_default { + group0 { + pinmux = <&iomuxc1_uart1_rxd_lpuart_rx_lpuart1_rx>, + <&iomuxc1_uart1_txd_lpuart_tx_lpuart1_tx>; + bias-pull-up; + slew-rate = "slightly_fast"; + drive-strength = "x5"; + }; + }; + + uart7_default: uart7_default { + group0 { + pinmux = <&iomuxc1_gpio_io09_lpuart_rx_lpuart7_rx>, + <&iomuxc1_gpio_io08_lpuart_tx_lpuart7_tx>; + bias-pull-up; + slew-rate = "slightly_fast"; + drive-strength = "x5"; + }; + }; +}; diff --git a/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_a55.dts b/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_a55.dts new file mode 100644 index 00000000000..5a9670357a9 --- /dev/null +++ b/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_a55.dts @@ -0,0 +1,78 @@ +/* + * Copyright 2025 Variscite Ltd. + * Copyright 2022,2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "imx93_var_som-pinctrl.dtsi" +#include +#include + +/ { + model = "Variscite VAR-SOM-MX93 A55"; + compatible = "fsl,mimx93"; + + chosen { + zephyr,console = &lpuart7; + zephyr,shell-uart = &lpuart7; + zephyr,sram = &sram0; + }; + + cpus { + cpu@0 { + status = "disabled"; + }; + }; + + sram0: memory@80400000 { + reg = <0x80400000 DT_SIZE_M(1)>; + }; + + lpuart7: serial@42690000 { + compatible = "nxp,imx-lpuart", "nxp,lpuart"; + reg = <0x42690000 DT_SIZE_K(64)>; + interrupts = ; + interrupt-names = "irq_0"; + interrupt-parent = <&gic>; + clocks = <&ccm IMX_CCM_LPUART7_CLK 0x6c 24>; + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart7_default>; + pinctrl-names = "default"; + }; + + aliases { + led0 = &blinky0; + sw0 = &button0; + }; + + leds { + compatible = "gpio-leds"; + + blinky0: blinky_0 { + gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; + }; + }; + + keys { + compatible = "gpio-keys"; + + button0: btn_0 { + label = "BTN0"; + gpios = <&gpio2 27 (GPIO_PULL_UP|GPIO_ACTIVE_LOW)>; + zephyr,code = ; + }; + }; +}; + +&gpio2 { + status = "okay"; +}; + +&gpio4 { + status = "okay"; +}; diff --git a/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_a55.yaml b/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_a55.yaml new file mode 100644 index 00000000000..26b23b9a21f --- /dev/null +++ b/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_a55.yaml @@ -0,0 +1,21 @@ +# +# Copyright 2025 Variscite Ltd. +# Copyright 2024 NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +identifier: imx93_var_som/mimx9352/a55 +name: Variscite VAR-SOM-MX93 A55 +type: mcu +arch: arm64 +toolchain: + - zephyr + - cross-compile +ram: 1024 +supported: + - gpio + - uart +testing: + ignore_tags: + - bluetooth diff --git a/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_a55_defconfig b/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_a55_defconfig new file mode 100644 index 00000000000..0819d35e45f --- /dev/null +++ b/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_a55_defconfig @@ -0,0 +1,30 @@ +# +# Copyright 2025 Variscite Ltd. +# Copyright 2022 NXP +# +# SPDX-License-Identifier: Apache-2.0 + +# ARM Options +CONFIG_AARCH64_IMAGE_HEADER=y +CONFIG_ARMV8_A_NS=y + +# MMU Options +CONFIG_MAX_XLAT_TABLES=64 + +# Cache Options +CONFIG_CACHE_MANAGEMENT=y +CONFIG_DCACHE_LINE_SIZE_DETECT=y +CONFIG_ICACHE_LINE_SIZE_DETECT=y + +# Zephyr Kernel Configuration +CONFIG_XIP=n +CONFIG_KERNEL_DIRECT_MAP=y + +# Serial Drivers +CONFIG_SERIAL=y + +# Enable Console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +CONFIG_CLOCK_CONTROL=y diff --git a/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_m33.dts b/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_m33.dts new file mode 100644 index 00000000000..c07e9e9fff5 --- /dev/null +++ b/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_m33.dts @@ -0,0 +1,66 @@ +/* + * Copyright 2025 Variscite Ltd. + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "imx93_var_som-pinctrl.dtsi" +#include "imx93_var_som-m33-common.dtsi" +#include +#include + +/ { + model = "Variscite VAR-SOM-MX93"; + compatible = "nxp,imx93_var_som"; + + chosen { + /* TCM */ + zephyr,flash = &itcm; + zephyr,sram = &dtcm; + + zephyr,console = &lpuart7; + zephyr,shell-uart = &lpuart7; + }; + + aliases { + led0 = &blinky0; + sw0 = &button0; + }; + + leds { + compatible = "gpio-leds"; + + blinky0: blinky_0 { + gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; + }; + }; + + keys { + compatible = "gpio-keys"; + + button0: btn_0 { + label = "BTN0"; + gpios = <&gpio2 27 (GPIO_PULL_UP|GPIO_ACTIVE_LOW)>; + zephyr,code = ; + }; + }; +}; + +&lpuart7 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart7_default>; + pinctrl-names = "default"; +}; + +&gpio2 { + status = "okay"; +}; + +&gpio4 { + status = "okay"; +}; diff --git a/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_m33.yaml b/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_m33.yaml new file mode 100644 index 00000000000..461218c9d9d --- /dev/null +++ b/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_m33.yaml @@ -0,0 +1,15 @@ +# Copyright 2025 Variscite Ltd. +# SPDX-License-Identifier: Apache-2.0 + +identifier: imx93_var_som/mimx9352/m33 +name: Variscite VAR-SOM-MX93 M33 +type: mcu +arch: arm +toolchain: + - zephyr + - cross-compile +ram: 128 +flash: 128 +supported: + - gpio + - uart diff --git a/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_m33_defconfig b/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_m33_defconfig new file mode 100644 index 00000000000..1583ec46004 --- /dev/null +++ b/boards/variscite/imx93_var_som/imx93_var_som_mimx9352_m33_defconfig @@ -0,0 +1,9 @@ +# Copyright 2025 Variscite Ltd. +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CLOCK_CONTROL=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_CONSOLE=y +CONFIG_XIP=y