drivers: ieee802154: nrf5: support reading EUI64 from UICR on nRF54L

Extend the existing code for reading EUI64 from UICR to
support nRF54L SoC series as well.

Signed-off-by: Damian Krolik <damian.krolik@nordicsemi.no>

drivers/ieee802154/Kconfig.nrf5

@@ -41,7 +41,7 @@ config IEEE802154_NRF5_EXT_IRQ_MGMT
 config IEEE802154_NRF5_UICR_EUI64_ENABLE
 	bool "Support usage of EUI64 value stored in UICR registers"
 	depends on !IEEE802154_VENDOR_OUI_ENABLE
-	depends on SOC_SERIES_NRF52X || SOC_SERIES_NRF53X
+	depends on SOC_SERIES_NRF52X || SOC_SERIES_NRF53X || SOC_SERIES_NRF54LX
 	help
 	  This option enables setting custom vendor EUI64 value
 	  stored in User information configuration registers (UICR).
@@ -55,6 +55,7 @@ config IEEE802154_NRF5_UICR_EUI64_REG
 	int "UICR base register for the EUI64 value"
 	range 0 30 if SOC_SERIES_NRF52X
 	range 0 190 if SOC_SERIES_NRF53X
+	range 0 318 if SOC_SERIES_NRF54LX
 	default 0
 	help
 	  Base of the two consecutive registers from the UICR customer

drivers/ieee802154/ieee802154_nrf5.c

@@ -72,7 +72,7 @@ static const struct device *nrf5_dev;
 #define NSEC_PER_TEN_SYMBOLS (10 * IEEE802154_PHY_OQPSK_780_TO_2450MHZ_SYMBOL_PERIOD_NS)
 
 #if defined(CONFIG_IEEE802154_NRF5_UICR_EUI64_ENABLE)
-#if defined(CONFIG_SOC_NRF5340_CPUAPP)
+#if defined(CONFIG_SOC_NRF5340_CPUAPP) || defined(CONFIG_SOC_SERIES_NRF54LX)
 #if defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
 #error "NRF_UICR->OTP is not supported to read from non-secure"
 #else
@@ -80,7 +80,7 @@ static const struct device *nrf5_dev;
 #endif /* CONFIG_TRUSTED_EXECUTION_NONSECURE */
 #else
 #define EUI64_ADDR (NRF_UICR->CUSTOMER)
-#endif /* CONFIG_SOC_NRF5340_CPUAPP */
+#endif /* CONFIG_SOC_NRF5340_CPUAPP || CONFIG_SOC_SERIES_NRF54LX*/
 #endif /* CONFIG_IEEE802154_NRF5_UICR_EUI64_ENABLE */
 
 #if defined(CONFIG_IEEE802154_NRF5_UICR_EUI64_ENABLE)