boards: nxp: mimxrt700_evk: add lpspi configuration

add lpspi14 pin settings
add lpspi14 edma setting in dts

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>

boards/nxp/mimxrt700_evk/board.c

@@ -1,5 +1,5 @@
 /*
- * Copyright 2024  NXP
+ * Copyright 2024-2025 NXP
  * SPDX-License-Identifier: Apache-2.0
  */
 #include <zephyr/init.h>
@@ -14,6 +14,18 @@
 /*!< xtal frequency in Hz */
 #define XTAL_SYS_CLK_HZ    24000000U
 
+#if CONFIG_SOC_MIMXRT798S_CM33_CPU0
+#define SYSCON_BASE DT_REG_ADDR(DT_NODELABEL(syscon0))
+#define EN_NUM 4
+#elif CONFIG_SOC_MIMXRT798S_CM33_CPU1
+#define SYSCON_BASE DT_REG_ADDR(DT_NODELABEL(syscon1))
+#define EN_NUM 2
+#endif
+
+#define EDMA_EN_OFFSET 0x420
+#define EDMA_EN_REG(instance, idx) ((uint32_t *)((uint32_t)(SYSCON_BASE) + \
+	(EDMA_EN_OFFSET) +  0x10U * (instance) + 4U * (idx)))
+
 #define SET_UP_FLEXCOMM_CLOCK(x)                                                                   \
 	do {                                                                                       \
 		CLOCK_AttachClk(kFCCLK0_to_FLEXCOMM##x);                                           \
@@ -36,6 +48,9 @@ const clock_audio_pll_config_t g_audioPllConfig_clock_init = {
 	.enableVcoOut = true};
 
 static void BOARD_InitAHBSC(void);
+#if CONFIG_DT_HAS_NXP_MCUX_EDMA_ENABLED
+static void edma_enable_all_request(uint8_t instance);
+#endif
 
 void board_early_init_hook(void)
 {
@@ -151,6 +166,18 @@ void board_early_init_hook(void)
 
 	BOARD_InitAHBSC();
 
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(edma0), okay)
+	CLOCK_EnableClock(kCLOCK_Dma0);
+	RESET_ClearPeripheralReset(kDMA0_RST_SHIFT_RSTn);
+	edma_enable_all_request(0);
+#endif
+
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(edma1), okay)
+	CLOCK_EnableClock(kCLOCK_Dma1);
+	RESET_ClearPeripheralReset(kDMA1_RST_SHIFT_RSTn);
+	edma_enable_all_request(1);
+#endif
+
 #if DT_NODE_HAS_STATUS(DT_NODELABEL(iocon), okay)
 	RESET_ClearPeripheralReset(kIOPCTL0_RST_SHIFT_RSTn);
 	CLOCK_EnableClock(kCLOCK_Iopctl0);
@@ -228,6 +255,8 @@ void board_early_init_hook(void)
 #endif
 
 #if DT_NODE_HAS_STATUS(DT_NODELABEL(lpspi14), okay)
+	CLOCK_AttachClk(kFRO1_DIV1_to_LPSPI14);
+	CLOCK_SetClkDiv(kCLOCK_DivLpspi14Clk, 3U);
 	CLOCK_EnableClock(kCLOCK_LPSpi14);
 	RESET_ClearPeripheralReset(kLPSPI14_RST_SHIFT_RSTn);
 #endif
@@ -387,3 +416,15 @@ static void BOARD_InitAHBSC(void)
 	GlikeyClearConfig(GLIKEY1);
 	GlikeyClearConfig(GLIKEY2);
 }
+
+#if CONFIG_DT_HAS_NXP_MCUX_EDMA_ENABLED
+static void edma_enable_all_request(uint8_t instance)
+{
+	uint32_t *reg;
+
+	for (uint8_t idx = 0; idx < EN_NUM; idx++) {
+		reg = EDMA_EN_REG(instance, idx);
+		*reg |= 0xFFFFFFFF;
+	}
+}
+#endif

boards/nxp/mimxrt700_evk/doc/index.rst

@@ -60,6 +60,8 @@ the hardware features below.
 +===========+============+=====================================+
 | NVIC      | on-chip    | nested vector interrupt controller  |
 +-----------+------------+-------------------------------------+
+| SPI       | on-chip    | spi                                 |
++-----------+------------+-------------------------------------+
 | SYSTICK   | on-chip    | systick                             |
 +-----------+------------+-------------------------------------+
 | IOCON     | on-chip    | pinmux                              |
@@ -100,6 +102,14 @@ functionality of a pin.
 +---------+-----------------+----------------------------+
 | PIO8_15 | UART19          | UART RX                    |
 +---------+-----------------+----------------------------+
+| PIO3_0  | SPI             | SPI MOSI                   |
++---------+-----------------+----------------------------+
+| PIO3_1  | SPI             | SPI SCK                    |
++---------+-----------------+----------------------------+
+| PIO3_2  | SPI             | SPI MISO                   |
++---------+-----------------+----------------------------+
+| PIO3_3  | SPI             | SPI SSEL                   |
++---------+-----------------+----------------------------+
 
 System Clock
 ============

boards/nxp/mimxrt700_evk/mimxrt700_evk-pinctrl.dtsi

@@ -1,5 +1,5 @@
 /*
- * Copyright 2024 NXP
+ * Copyright 2024-2025 NXP
  * SPDX-License-Identifier: Apache-2.0
  */
 
@@ -33,4 +33,16 @@
 			drive-strength = "normal";
 		};
 	};
+
+	pinmux_lpspi14: pinmux_lpspi14 {
+		group0 {
+			pinmux = <LPSPI14_SOUT_PIO3_0>,
+				<LPSPI14_SCK_PIO3_1>,
+				<LPSPI14_SIN_PIO3_2>,
+				<LPSPI14_PCS0_PIO3_3>;
+			slew-rate = "normal";
+			drive-strength = "normal";
+			input-enable;
+		};
+	};
 };

boards/nxp/mimxrt700_evk/mimxrt700_evk_mimxrt798s_cm33_cpu0.dts

@@ -1,5 +1,5 @@
 /*
- * Copyright 2024 NXP
+ * Copyright 2024-2025 NXP
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -56,6 +56,10 @@
 	};
 };
 
+&edma0 {
+	status = "okay";
+};
+
 &systick {
 	status = "okay";
 };
@@ -71,6 +75,15 @@
 	pinctrl-names = "default";
 };
 
+&lpspi14 {
+	status = "okay";
+	/* DMA channels 0 and 1, muxed to LPSPI14 RX and TX */
+	dmas = <&edma0 0 73>, <&edma0 1 74>;
+	dma-names = "rx", "tx";
+	pinctrl-0 = <&pinmux_lpspi14>;
+	pinctrl-names = "default";
+};
+
 &gpio0 {
 	status = "okay";
 };

boards/nxp/mimxrt700_evk/mimxrt700_evk_mimxrt798s_cm33_cpu0.yaml

@@ -1,5 +1,5 @@
 #
-# Copyright 2024 NXP
+# Copyright 2024-2025 NXP
 #
 # SPDX-License-Identifier: Apache-2.0
 #
@@ -16,4 +16,5 @@ toolchain:
 supported:
   - gpio
   - uart
+  - spi
 vendor: nxp