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Common pwm driver for MAX32xxx MCUs Co-authored-by: Mert Ekren <mert.ekren@analog.com> Co-authored-by: Mert Vatansever <mert.vatansever@analog.com> Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>pull/78912/head
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# Copyright (c) 2023-2024 Analog Devices, Inc. |
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# SPDX-License-Identifier: Apache-2.0 |
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config PWM_MAX32 |
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bool "MAX32 PWM driver" |
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default y |
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depends on DT_HAS_ADI_MAX32_PWM_ENABLED |
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select PINCTRL |
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help |
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Enable the MAX32 PWM driver. |
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/*
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* Copyright (c) 2023-2024 Analog Devices, Inc. |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT adi_max32_pwm |
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#include <errno.h> |
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#include <zephyr/drivers/clock_control/adi_max32_clock_control.h> |
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#include <zephyr/drivers/pwm.h> |
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#include <zephyr/drivers/pinctrl.h> |
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#include <zephyr/sys/util_macro.h> |
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#include <wrap_max32_tmr.h> |
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#include <zephyr/logging/log.h> |
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LOG_MODULE_REGISTER(pwm_max32, CONFIG_PWM_LOG_LEVEL); |
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/** PWM configuration. */ |
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struct max32_pwm_config { |
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mxc_tmr_regs_t *regs; |
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const struct pinctrl_dev_config *pctrl; |
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const struct device *clock; |
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struct max32_perclk perclk; |
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int prescaler; |
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}; |
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/** PWM data. */ |
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struct max32_pwm_data { |
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uint32_t period_cycles; |
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}; |
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static int api_set_cycles(const struct device *dev, uint32_t channel, uint32_t period_cycles, |
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uint32_t pulse_cycles, pwm_flags_t flags) |
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{ |
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int ret = 0; |
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const struct max32_pwm_config *cfg = dev->config; |
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mxc_tmr_regs_t *regs = cfg->regs; |
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wrap_mxc_tmr_cfg_t pwm_cfg; |
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int prescaler_index; |
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prescaler_index = LOG2(cfg->prescaler); |
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if (prescaler_index == 0) { |
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pwm_cfg.pres = TMR_PRES_1; /* TMR_PRES_1 is 0 */ |
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} else { |
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/* TMR_PRES_2 is 1<<X */ |
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pwm_cfg.pres = TMR_PRES_2 + (prescaler_index - 1); |
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} |
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pwm_cfg.mode = TMR_MODE_PWM; |
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pwm_cfg.cmp_cnt = period_cycles; |
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pwm_cfg.bitMode = 0; /* Timer Mode 32 bit */ |
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if (pulse_cycles == 0) { |
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/* Special case to handle duty_cycle=0 case */ |
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pulse_cycles = period_cycles; |
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pwm_cfg.pol = (flags & PWM_POLARITY_MASK) ? 1 : 0; |
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} else { |
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pwm_cfg.pol = (flags & PWM_POLARITY_MASK) ? 0 : 1; |
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} |
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pwm_cfg.clock = Wrap_MXC_TMR_GetClockIndex(cfg->perclk.clk_src); |
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if (pwm_cfg.clock < 0) { |
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return -ENOTSUP; |
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} |
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MXC_TMR_Shutdown(regs); |
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/* enable clock */ |
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ret = clock_control_on(cfg->clock, (clock_control_subsys_t)&cfg->perclk); |
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if (ret) { |
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return ret; |
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} |
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ret = Wrap_MXC_TMR_Init(regs, &pwm_cfg); |
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if (ret != E_NO_ERROR) { |
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return ret; |
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} |
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ret = MXC_TMR_SetPWM(regs, pulse_cycles); |
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if (ret != E_NO_ERROR) { |
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return -EINVAL; |
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} |
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MXC_TMR_Start(regs); |
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return 0; |
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} |
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static int api_get_cycles_per_sec(const struct device *dev, uint32_t channel, uint64_t *cycles) |
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{ |
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int ret = 0; |
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const struct max32_pwm_config *cfg = dev->config; |
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uint32_t clk_frequency = 0; |
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ret = clock_control_get_rate(cfg->clock, (clock_control_subsys_t)&cfg->perclk, |
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&clk_frequency); |
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if (clk_frequency == 0) { |
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return -ENOTSUP; /* Unsupported clock source */ |
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} |
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*cycles = (uint64_t)(clk_frequency / cfg->prescaler); |
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return ret; |
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} |
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static const struct pwm_driver_api pwm_max32_driver_api = { |
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.set_cycles = api_set_cycles, |
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.get_cycles_per_sec = api_get_cycles_per_sec, |
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}; |
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static int pwm_max32_init(const struct device *dev) |
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{ |
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int ret = 0; |
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const struct max32_pwm_config *cfg = dev->config; |
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ret = pinctrl_apply_state(cfg->pctrl, PINCTRL_STATE_DEFAULT); |
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if (ret) { |
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LOG_ERR("PWM pinctrl initialization failed (%d)", ret); |
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} |
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return ret; |
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} |
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#define PWM_MAX32_DEFINE(_num) \ |
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static struct max32_pwm_data max32_pwm_data_##_num; \ |
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PINCTRL_DT_INST_DEFINE(_num); \ |
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static const struct max32_pwm_config max32_pwm_config_##_num = { \ |
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.regs = (mxc_tmr_regs_t *)DT_REG_ADDR(DT_INST_PARENT(_num)), \ |
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.pctrl = PINCTRL_DT_INST_DEV_CONFIG_GET(_num), \ |
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.clock = DEVICE_DT_GET(DT_CLOCKS_CTLR(DT_INST_PARENT(_num))), \ |
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.perclk.bus = DT_CLOCKS_CELL(DT_INST_PARENT(_num), offset), \ |
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.perclk.bit = DT_CLOCKS_CELL(DT_INST_PARENT(_num), bit), \ |
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.perclk.clk_src = DT_PROP(DT_INST_PARENT(_num), clock_source), \ |
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.prescaler = DT_PROP(DT_INST_PARENT(_num), prescaler), \ |
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}; \ |
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DEVICE_DT_INST_DEFINE(_num, &pwm_max32_init, NULL, &max32_pwm_data_##_num, \ |
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&max32_pwm_config_##_num, POST_KERNEL, CONFIG_PWM_INIT_PRIORITY, \ |
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&pwm_max32_driver_api); |
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DT_INST_FOREACH_STATUS_OKAY(PWM_MAX32_DEFINE) |
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