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drivers: gpio: davinci: Match GPIO address with Linux

Currently, the Zephyr dt requires address to the direction register
instead of the base GPIO address. usually means base address + 0x10 when
compared with Linux.

To make things more consistent between linux and zephyr, handle the
direction offset in the driver itself. This also lays the foundation for
supporting more than 32 GPIOs per port in the future by introducing
offsets for all the banks.

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
pull/90112/merge
Ayush Singh 2 months ago committed by Benjamin Cabé
parent
commit
18c569829a
  1. 39
      drivers/gpio/gpio_davinci.c

39
drivers/gpio/gpio_davinci.c

@ -27,14 +27,11 @@ LOG_MODULE_REGISTER(gpio_davinci, CONFIG_GPIO_LOG_LEVEL); @@ -27,14 +27,11 @@ LOG_MODULE_REGISTER(gpio_davinci, CONFIG_GPIO_LOG_LEVEL);
#define DEV_CFG(dev) \
((const struct gpio_davinci_config *)((dev)->config))
#define DEV_DATA(dev) ((struct gpio_davinci_data *)(dev)->data)
#define DEV_GPIO_CFG_BASE(dev) \
((struct gpio_davinci_regs *)DEVICE_MMIO_NAMED_GET(dev, port_base))
#define GPIO_DAVINCI_DIR_RESET_VAL (0xFFFFFFFF)
struct gpio_davinci_regs {
uint32_t UNUSED[4]; /* 0x00-0x0C */
uint32_t dir; /* 0x10 */
uint32_t dir;
uint32_t out_data;
uint32_t set_data;
uint32_t clr_data;
@ -64,10 +61,22 @@ struct gpio_davinci_config { @@ -64,10 +61,22 @@ struct gpio_davinci_config {
const struct pinctrl_dev_config *pcfg;
};
const unsigned int offset_array[5] = {0x10, 0x38, 0x60, 0x88, 0xb0};
#define MAX_REGS_BANK ARRAY_SIZE(offset_array)
#define BANK0 0
static struct gpio_davinci_regs *gpio_davinci_get_regs(const struct device *dev, uint8_t bank)
{
__ASSERT(bank < MAX_REGS_BANK, "Invalid bank");
return (struct gpio_davinci_regs *)((uint8_t *)DEVICE_MMIO_NAMED_GET(dev, port_base) +
offset_array[bank]);
}
static int gpio_davinci_configure(const struct device *dev, gpio_pin_t pin,
gpio_flags_t flags)
{
volatile struct gpio_davinci_regs *regs = DEV_GPIO_CFG_BASE(dev);
volatile struct gpio_davinci_regs *regs = gpio_davinci_get_regs(dev, BANK0);
if ((flags & GPIO_SINGLE_ENDED) != 0) {
return -ENOTSUP;
@ -94,7 +103,7 @@ static int gpio_davinci_configure(const struct device *dev, gpio_pin_t pin, @@ -94,7 +103,7 @@ static int gpio_davinci_configure(const struct device *dev, gpio_pin_t pin,
static int gpio_davinci_port_get_raw(const struct device *dev,
gpio_port_value_t *value)
{
volatile struct gpio_davinci_regs *regs = DEV_GPIO_CFG_BASE(dev);
volatile struct gpio_davinci_regs *regs = gpio_davinci_get_regs(dev, BANK0);
*value = regs->in_data;
@ -104,7 +113,7 @@ static int gpio_davinci_port_get_raw(const struct device *dev, @@ -104,7 +113,7 @@ static int gpio_davinci_port_get_raw(const struct device *dev,
static int gpio_davinci_port_set_masked_raw(const struct device *dev,
gpio_port_pins_t mask, gpio_port_value_t value)
{
volatile struct gpio_davinci_regs *regs = DEV_GPIO_CFG_BASE(dev);
volatile struct gpio_davinci_regs *regs = gpio_davinci_get_regs(dev, BANK0);
regs->out_data = (regs->out_data & (~mask)) | (mask & value);
@ -114,7 +123,7 @@ static int gpio_davinci_port_set_masked_raw(const struct device *dev, @@ -114,7 +123,7 @@ static int gpio_davinci_port_set_masked_raw(const struct device *dev,
static int gpio_davinci_port_set_bits_raw(const struct device *dev,
gpio_port_pins_t mask)
{
volatile struct gpio_davinci_regs *regs = DEV_GPIO_CFG_BASE(dev);
volatile struct gpio_davinci_regs *regs = gpio_davinci_get_regs(dev, BANK0);
regs->set_data = mask;
@ -124,7 +133,7 @@ static int gpio_davinci_port_set_bits_raw(const struct device *dev, @@ -124,7 +133,7 @@ static int gpio_davinci_port_set_bits_raw(const struct device *dev,
static int gpio_davinci_port_clear_bits_raw(const struct device *dev,
gpio_port_pins_t mask)
{
volatile struct gpio_davinci_regs *regs = DEV_GPIO_CFG_BASE(dev);
volatile struct gpio_davinci_regs *regs = gpio_davinci_get_regs(dev, BANK0);
regs->clr_data = mask;
@ -134,7 +143,7 @@ static int gpio_davinci_port_clear_bits_raw(const struct device *dev, @@ -134,7 +143,7 @@ static int gpio_davinci_port_clear_bits_raw(const struct device *dev,
static int gpio_davinci_port_toggle_bits(const struct device *dev,
gpio_port_pins_t mask)
{
volatile struct gpio_davinci_regs *regs = DEV_GPIO_CFG_BASE(dev);
volatile struct gpio_davinci_regs *regs = gpio_davinci_get_regs(dev, BANK0);
regs->out_data ^= mask;
@ -167,11 +176,11 @@ static int gpio_davinci_init(const struct device *dev) @@ -167,11 +176,11 @@ static int gpio_davinci_init(const struct device *dev)
return 0;
}
#define GPIO_DAVINCI_INIT_FUNC(n) \
static void gpio_davinci_bank_##n##_config(const struct device *dev) \
{ \
volatile struct gpio_davinci_regs *regs = DEV_GPIO_CFG_BASE(dev); \
regs->dir = GPIO_DAVINCI_DIR_RESET_VAL; \
#define GPIO_DAVINCI_INIT_FUNC(n) \
static void gpio_davinci_bank_##n##_config(const struct device *dev) \
{ \
volatile struct gpio_davinci_regs *regs = gpio_davinci_get_regs(dev, BANK0); \
regs->dir = GPIO_DAVINCI_DIR_RESET_VAL; \
}
#define GPIO_DAVINCI_INIT(n) \

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