@ -15,7 +15,7 @@
@@ -15,7 +15,7 @@
# include <zephyr/drivers/gpio/gpio_utils.h>
# include "gpio_renesas_rz.h"
# include <zephyr/logging/log.h>
# if defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L )
# if defined(CONFIG_RENESAS_RZ_EXT_IRQ )
# include "r_icu.h"
# include <zephyr/drivers/interrupt_controller/intc_rz_ext_irq.h>
# endif
@ -33,7 +33,7 @@ struct gpio_rz_config {
@@ -33,7 +33,7 @@ struct gpio_rz_config {
const ioport_api_t * fsp_api ;
const struct device * int_dev ;
uint8_t int_num [ GPIO_RZ_MAX_INT_NUM ] ;
# if defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L )
# if defined(CONFIG_RENESAS_RZ_EXT_IRQ )
const struct device * eirq_dev [ GPIO_RZ_MAX_INT_NUM ] ;
void ( * cb_list [ GPIO_RZ_MAX_INT_NUM ] ) ( void * arg ) ;
@ -45,7 +45,7 @@ struct gpio_rz_data {
@@ -45,7 +45,7 @@ struct gpio_rz_data {
sys_slist_t cb ;
ioport_instance_ctrl_t * fsp_ctrl ;
struct k_spinlock lock ;
# if defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L )
# if defined(CONFIG_RENESAS_RZ_EXT_IRQ )
uint8_t pin [ GPIO_RZ_MAX_INT_NUM ] ;
# endif
} ;
@ -287,18 +287,14 @@ static int gpio_rz_port_toggle_bits(const struct device *dev, gpio_port_pins_t p
@@ -287,18 +287,14 @@ static int gpio_rz_port_toggle_bits(const struct device *dev, gpio_port_pins_t p
return 0 ;
}
# define GPIO_RZ_HAS_INTERRUPT \
DT_HAS_COMPAT_STATUS_OKAY ( renesas_rz_gpio_int ) | \
DT_HAS_COMPAT_STATUS_OKAY ( renesas_rz_ext_irq )
# if GPIO_RZ_HAS_INTERRUPT
# if defined(CONFIG_GPIO_RENESAS_RZ_HAS_GPIO_INTERRUPT) || defined(CONFIG_RENESAS_RZ_EXT_IRQ)
static int gpio_rz_int_disable ( const struct device * dev , const struct device * gpio_dev ,
uint8_t int_num , gpio_pin_t pin )
{
# if defined(CONFIG_SOC_SERIES_RZG3S )
volatile uint32_t * tssr = & R_INTC_IM33 - > TSSR0 ;
volatile uint32_t * titsr = & R_INTC_IM33 - > TITSR0 ;
volatile uint32_t * tscr = & R_INTC_IM33 - > TSCR ;
# if defined(CONFIG_GPIO_RENESAS_RZ_HAS_GPIO_INTERRUPT)
volatile uint32_t * tssr = & R_INTC - > TSSR0 ;
volatile uint32_t * titsr = & R_INTC - > TITSR0 ;
volatile uint32_t * tscr = & R_INTC - > TSCR ;
struct gpio_rz_int_data * data = dev - > data ;
/* Get register offset base on interrupt number. */
@ -319,14 +315,14 @@ static int gpio_rz_int_disable(const struct device *dev, const struct device *gp
@@ -319,14 +315,14 @@ static int gpio_rz_int_disable(const struct device *dev, const struct device *gp
data - > gpio_mapping [ int_num ] . gpio_dev = NULL ;
data - > gpio_mapping [ int_num ] . pin = UINT8_MAX ;
# elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L )
# elif defined(CONFIG_RENESAS_RZ_EXT_IRQ )
const struct gpio_rz_config * gpio_config = gpio_dev - > config ;
const struct device * eirq_dev = gpio_config - > eirq_dev [ pin ] ;
if ( device_is_ready ( eirq_dev ) ) {
intc_rz_ext_irq_disable ( eirq_dev ) ;
}
# endif /* CONFIG_SOC_SERIES_* */
# endif /* CONFIG_RENESAS_RZ_EXT_IRQ */
return 0 ;
}
@ -340,9 +336,9 @@ static int gpio_rz_int_enable(const struct device *int_dev, const struct device
@@ -340,9 +336,9 @@ static int gpio_rz_int_enable(const struct device *int_dev, const struct device
const struct gpio_rz_config * gpio_config = gpio_dev - > config ;
# if defined(CONFIG_SOC_SERIES_RZG3S )
volatile uint32_t * tssr = & R_INTC_IM33 - > TSSR0 ;
volatile uint32_t * titsr = & R_INTC_IM33 - > TITSR0 ;
# if defined(CONFIG_GPIO_RENESAS_RZ_HAS_GPIO_INTERRUPT )
volatile uint32_t * tssr = & R_INTC - > TSSR0 ;
volatile uint32_t * titsr = & R_INTC - > TITSR0 ;
struct gpio_rz_int_data * int_data = int_dev - > data ;
tssr = & tssr [ int_num / 4 ] ;
@ -356,12 +352,12 @@ static int gpio_rz_int_enable(const struct device *int_dev, const struct device
@@ -356,12 +352,12 @@ static int gpio_rz_int_enable(const struct device *int_dev, const struct device
if ( irq_type = = GPIO_RZ_INT_EDGE_RISING | | irq_type = = GPIO_RZ_INT_EDGE_FALLING ) {
int_data - > irq_set_edge | = BIT ( int_num ) ;
/* Clear interrupt status. */
R_INTC_IM33 - > TSCR & = ~ BIT ( int_num ) ;
R_INTC - > TSCR & = ~ BIT ( int_num ) ;
}
irq_enable ( GPIO_RZ_TINT_IRQ_GET ( int_num ) ) ;
int_data - > gpio_mapping [ int_num ] . gpio_dev = gpio_dev ;
int_data - > gpio_mapping [ int_num ] . pin = pin ;
# elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L )
# elif defined(CONFIG_RENESAS_RZ_EXT_IRQ )
const struct device * eirq_dev = gpio_config - > eirq_dev [ pin ] ;
struct gpio_rz_data * gpio_data = gpio_dev - > data ;
@ -372,7 +368,7 @@ static int gpio_rz_int_enable(const struct device *int_dev, const struct device
@@ -372,7 +368,7 @@ static int gpio_rz_int_enable(const struct device *int_dev, const struct device
intc_rz_ext_irq_set_callback ( eirq_dev , gpio_config - > cb_list [ int_num ] ,
( void * ) gpio_dev ) ;
}
# endif /* CONFIG_SOC_SERIES_* */
# endif /* CONFIG_GPIO_RENESAS_RZ_HAS_GPIO_INTERRUPT */
return 0 ;
}
@ -445,10 +441,10 @@ static int gpio_rz_manage_callback(const struct device *dev, struct gpio_callbac
@@ -445,10 +441,10 @@ static int gpio_rz_manage_callback(const struct device *dev, struct gpio_callbac
static void gpio_rz_isr ( uint16_t irq , void * param )
{
# if defined(CONFIG_SOC_SERIES_RZG3S )
# if defined(CONFIG_GPIO_RENESAS_RZ_HAS_GPIO_INTERRUPT )
const struct device * dev = param ;
struct gpio_rz_int_data * int_data = dev - > data ;
volatile uint32_t * tscr = & R_INTC_IM33 - > TSCR ;
volatile uint32_t * tscr = & R_INTC - > TSCR ;
if ( ! ( * tscr & BIT ( irq ) ) ) {
LOG_DEV_DBG ( dev , " tint:%u spurious irq, status 0 " , irq ) ;
@ -464,16 +460,16 @@ static void gpio_rz_isr(uint16_t irq, void *param)
@@ -464,16 +460,16 @@ static void gpio_rz_isr(uint16_t irq, void *param)
struct gpio_rz_data * gpio_data = gpio_dev - > data ;
gpio_fire_callbacks ( & gpio_data - > cb , gpio_dev , BIT ( pin ) ) ;
# elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L )
# elif defined(CONFIG_RENESAS_RZ_EXT_IRQ )
const struct device * gpio_dev = ( const struct device * ) param ;
struct gpio_rz_data * gpio_data = gpio_dev - > data ;
uint8_t pin = gpio_data - > pin [ irq ] ;
gpio_fire_callbacks ( & gpio_data - > cb , gpio_dev , BIT ( pin ) ) ;
# endif /* CONFIG_SOC_SERIES_* */
# endif /* CONFIG_GPIO_RENESAS_RZ_HAS_GPIO_INTERRUPT */
}
# endif /* GPIO_RZ_HAS_INTERRUPT */
# endif /* CONFIG_ GPIO_RENESAS_R Z_HAS_GPIO_ INTERRUPT || CONFIG_RENESAS_RZ_EXT_IRQ */
static DEVICE_API ( gpio , gpio_rz_driver_api ) = {
. pin_configure = gpio_rz_pin_configure ,
@ -485,7 +481,7 @@ static DEVICE_API(gpio, gpio_rz_driver_api) = {
@@ -485,7 +481,7 @@ static DEVICE_API(gpio, gpio_rz_driver_api) = {
. port_set_bits_raw = gpio_rz_port_set_bits_raw ,
. port_clear_bits_raw = gpio_rz_port_clear_bits_raw ,
. port_toggle_bits = gpio_rz_port_toggle_bits ,
# if GPIO_RZ_HAS_INTERRUPT
# if defined(CONFIG_ GPIO_RENESAS_R Z_HAS_GPIO_ INTERRUPT) || defined(CONFIG_RENESAS_RZ_EXT_IRQ)
. pin_interrupt_configure = gpio_rz_pin_interrupt_configure ,
. manage_callback = gpio_rz_manage_callback ,
# endif
@ -500,7 +496,8 @@ static DEVICE_API(gpio, gpio_rz_driver_api) = {
@@ -500,7 +496,8 @@ static DEVICE_API(gpio, gpio_rz_driver_api) = {
# define GPIO_RZ_ALL_ISR_DEFINE(irq_num) LISTIFY(irq_num, GPIO_RZ_ISR_DEFINE, ())
# if defined(CONFIG_SOC_SERIES_RZG3S)
# if defined(CONFIG_GPIO_RENESAS_RZ_HAS_GPIO_INTERRUPT) || defined(CONFIG_RENESAS_RZ_EXT_IRQ)
# if defined(CONFIG_GPIO_RENESAS_RZ_HAS_GPIO_INTERRUPT)
# define GPIO_RZ_INT_DEFINE(inst) .int_dev = DEVICE_DT_GET_OR_NULL(DT_INST(0, renesas_rz_gpio_int))
@ -537,7 +534,7 @@ static int gpio_rz_int_init(const struct device *dev)
@@ -537,7 +534,7 @@ static int gpio_rz_int_init(const struct device *dev)
UTIL_DEC ( CONFIG_GPIO_INIT_PRIORITY ) , NULL ) ;
DT_FOREACH_STATUS_OKAY ( renesas_rz_gpio_int , GPIO_RZ_INT_INIT )
# elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L) && GPIO_RZ_HAS_INTERRUPT
# elif defined(CONFIG_RENESAS_RZ_EXT_IRQ)
GPIO_RZ_ALL_ISR_DEFINE ( GPIO_RZ_MAX_INT_NUM )
@ -558,9 +555,12 @@ GPIO_RZ_ALL_ISR_DEFINE(GPIO_RZ_MAX_INT_NUM)
@@ -558,9 +555,12 @@ GPIO_RZ_ALL_ISR_DEFINE(GPIO_RZ_MAX_INT_NUM)
# define GPIO_RZ_INT_DEFINE(inst) \
. eirq_dev = { ALL_EIRQ_DEV_GET ( inst ) } , \
. cb_list = { LISTIFY ( GPIO_RZ_MAX_INT_NUM , EIRQ_CB_GET , ( , ) ) }
# endif /* CONFIG_GPIO_RENESAS_RZ_HAS_GPIO_INTERRUPT */
# else
# define GPIO_RZ_INT_DEFINE(inst)
# endif /* CONFIG_SOC_SERIES_* */
# endif /* CONFIG_GPIO_RENESAS_RZ_HAS_GPIO_INTERRUPT || CONFIG_RENESAS_RZ_EXT_IRQ */
# define VALUE_2X(i, _) UTIL_X2(i)
# define PIN_IRQ_GET(idx, inst) \
@ -573,7 +573,7 @@ GPIO_RZ_ALL_ISR_DEFINE(GPIO_RZ_MAX_INT_NUM)
@@ -573,7 +573,7 @@ GPIO_RZ_ALL_ISR_DEFINE(GPIO_RZ_MAX_INT_NUM)
FOR_EACH_FIXED_ARG ( PIN_IRQ_GET , ( ) , inst , \
LISTIFY ( DT_INST_PROP_LEN_OR ( inst , irqs , 0 ) , VALUE_2X , ( , ) ) )
# define RZG _GPIO_PORT_INIT(inst) \
# define RZ_GPIO_PORT_INIT(inst) \
static ioport_cfg_t g_ioport_ # # inst # # _cfg = { \
. number_of_pins = 0 , \
. p_pin_cfg_data = NULL , \
@ -599,4 +599,4 @@ GPIO_RZ_ALL_ISR_DEFINE(GPIO_RZ_MAX_INT_NUM)
@@ -599,4 +599,4 @@ GPIO_RZ_ALL_ISR_DEFINE(GPIO_RZ_MAX_INT_NUM)
DEVICE_DT_INST_DEFINE ( inst , NULL , NULL , & gpio_rz_ # # inst # # _data , & gpio_rz_ # # inst # # _config , \
POST_KERNEL , CONFIG_GPIO_INIT_PRIORITY , & gpio_rz_driver_api ) ;
DT_INST_FOREACH_STATUS_OKAY ( RZG _GPIO_PORT_INIT )
DT_INST_FOREACH_STATUS_OKAY ( RZ_GPIO_PORT_INIT )