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Add support for systim to cc23x0 SoC. Signed-off-by: Lars Thalian Morstad <l-morstad@ti.com> Signed-off-by: Vebjorn Myklebust <v.myklebust@ti.com> Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com> Signed-off-by: Julien Panis <jpanis@baylibre.com>pull/85234/head
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# Copyright (c) 2024 Texas Instruments Incorporated |
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# Copyright (c) 2024 BayLibre, SAS |
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# |
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# SPDX-License-Identifier: Apache-2.0 |
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config CC23X0_SYSTIM_TIMER |
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bool "TI SimpleLink CC23X0 system clock timer" |
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default y |
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depends on HAS_CC23X0_SDK |
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select TICKLESS_CAPABLE |
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help |
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This module provides the "system clock driver" interfaces |
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for the TI Simplelink CC23X0 devices. |
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/*
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* Copyright (c) 2024 Texas Instruments Incorporated |
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* Copyright (c) 2024 BayLibre, SAS |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT ti_cc23x0_systim_timer |
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/*
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* TI SimpleLink CC23X0 timer driver based on SYSTIM |
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*/ |
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#include <soc.h> |
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#include <zephyr/device.h> |
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#include <zephyr/drivers/clock_control.h> |
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#include <zephyr/drivers/timer/system_timer.h> |
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#include <zephyr/irq.h> |
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#include <zephyr/spinlock.h> |
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#include <zephyr/sys_clock.h> |
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#include <zephyr/sys/util.h> |
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#include <inc/hw_types.h> |
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#include <inc/hw_memmap.h> |
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#include <inc/hw_systim.h> |
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#include <inc/hw_evtsvt.h> |
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/* Kernel tick period in microseconds (same timebase as systim) */ |
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#define TICK_PERIOD_MICRO_SEC (1000000 / CONFIG_SYS_CLOCK_TICKS_PER_SEC) |
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/*
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* Max number of systim ticks into the future |
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* |
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* Under the hood, the kernel timer uses the SysTimer whose events trigger |
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* immediately if the compare value is less than 2^22 systimer ticks in the past |
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* (4.194sec at 1us resolution). Therefore, the max number of SysTimer ticks you |
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* can schedule into the future is 2^32 - 2^22 - 1 ticks (~= 4290 sec at 1us |
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* resolution). |
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*/ |
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#define SYSTIM_TIMEOUT_MAX 0xFFBFFFFFU |
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/* Set systim interrupt to lowest priority */ |
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#define SYSTIM_ISR_PRIORITY 3U |
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/* Keep track of systim counter at previous announcement to the kernel */ |
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static uint32_t last_systim_count; |
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static void systim_isr(const void *arg); |
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static int sys_clock_driver_init(void); |
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/*
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* Set system clock timeout. |
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*/ |
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void sys_clock_set_timeout(int32_t ticks, bool idle) |
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{ |
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ARG_UNUSED(idle); |
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/* If timeout is necessary */ |
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if (ticks != K_TICKS_FOREVER) { |
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/* Get current value as early as possible */ |
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uint32_t now_tick = HWREG(SYSTIM_BASE + SYSTIM_O_TIME1U); |
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uint32_t timeout = ticks * TICK_PERIOD_MICRO_SEC; |
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if (timeout > SYSTIM_TIMEOUT_MAX) { |
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timeout = SYSTIM_TIMEOUT_MAX; |
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} |
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/* This should wrap around */ |
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HWREG(SYSTIM_BASE + SYSTIM_O_CH0CC) = now_tick + timeout; |
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} |
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} |
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uint32_t sys_clock_elapsed(void) |
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{ |
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/* Get current value as early as possible */ |
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uint32_t current_systim_count = HWREG(SYSTIM_BASE + SYSTIM_O_TIME1U); |
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uint32_t elapsed_systim; |
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if (current_systim_count >= last_systim_count) { |
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elapsed_systim = current_systim_count - last_systim_count; |
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} else { |
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elapsed_systim = (UINT32_MAX - last_systim_count) + current_systim_count; |
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} |
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int32_t elapsed_ticks = elapsed_systim / TICK_PERIOD_MICRO_SEC; |
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return elapsed_ticks; |
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} |
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uint32_t sys_clock_cycle_get_32(void) |
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{ |
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return HWREG(SYSTIM_BASE + SYSTIM_O_TIME1U); |
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} |
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void systim_isr(const void *arg) |
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{ |
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/* Get current value as early as possible */ |
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uint32_t current_systim_count = HWREG(SYSTIM_BASE + SYSTIM_O_TIME1U); |
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uint32_t elapsed_systim; |
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if (current_systim_count >= last_systim_count) { |
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elapsed_systim = current_systim_count - last_systim_count; |
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} else { |
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elapsed_systim = (UINT32_MAX - last_systim_count) + current_systim_count; |
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} |
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int32_t elapsed_ticks = elapsed_systim / TICK_PERIOD_MICRO_SEC; |
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sys_clock_announce(elapsed_ticks); |
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last_systim_count = current_systim_count; |
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/* Do not re-arm systim. Zephyr will do so through sys_clock_set_timeout */ |
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} |
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static int sys_clock_driver_init(void) |
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{ |
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uint32_t now_tick; |
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/* Get current value as early as possible */ |
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now_tick = HWREG(SYSTIM_BASE + SYSTIM_O_TIME1U); |
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last_systim_count = now_tick; |
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/* Clear any pending interrupts on SysTimer channel 0 */ |
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HWREG(SYSTIM_BASE + SYSTIM_O_ICLR) = SYSTIM_ICLR_EV0_CLR; |
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/*
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* Configure SysTimer channel 0 to compare mode with timer |
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* resolution of 1 us. |
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*/ |
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HWREG(SYSTIM_BASE + SYSTIM_O_CH0CFG) = 0; |
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/* Make SysTimer halt on CPU debug halt */ |
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HWREG(SYSTIM_BASE + SYSTIM_O_EMU) = SYSTIM_EMU_HALT_STOP; |
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HWREG(EVTSVT_BASE + EVTSVT_O_CPUIRQ16SEL) = EVTSVT_CPUIRQ16SEL_PUBID_SYSTIM0; |
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/*
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* Set IMASK for channel 0. IMASK is used by the power driver to know |
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* which systimer channels are active. |
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*/ |
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HWREG(SYSTIM_BASE + SYSTIM_O_IMSET) = SYSTIM_IMSET_EV0_SET; |
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/* This should wrap around and set a maximum timeout */ |
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HWREG(SYSTIM_BASE + SYSTIM_O_CH0CC) = now_tick + SYSTIM_TIMEOUT_MAX; |
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/* Take configurable interrupt IRQ16 for systimer */ |
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IRQ_CONNECT(CPUIRQ16_IRQn, SYSTIM_ISR_PRIORITY, systim_isr, 0, 0); |
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irq_enable(CPUIRQ16_IRQn); |
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return 0; |
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} |
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SYS_INIT(sys_clock_driver_init, PRE_KERNEL_2, CONFIG_SYSTEM_CLOCK_INIT_PRIORITY); |
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# Copyright (c) 2024 Baylibre SAS |
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# SPDX-License-Identifier: Apache-2.0 |
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description: TI SimpleLink CC23x0 Timer Node |
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compatible: "ti,cc23x0-systim-timer" |
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include: base.yaml |
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properties: |
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reg: |
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required: true |
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interrupts: |
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required: true |
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