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Add DDR variant of the i.MX95 EVK board (M7 core). Using this variant, one can run Zephyr from DDR instead of ITCM/DTCM as it's the case for the M7 "base" board. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>pull/78626/head
6 changed files with 90 additions and 5 deletions
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/* |
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* Copyright 2024 NXP |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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/dts-v1/; |
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#include "imx95_evk_mimx9596_m7.dts" |
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/ { |
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model = "NXP i.MX95 EVK board DDR variant"; |
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chosen { |
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zephyr,sram = &ddr; |
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/delete-property/ zephyr,flash; |
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}; |
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ddr: memory@80000000 { |
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device_type = "memory"; |
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reg = <0x80000000 DT_SIZE_M(4)>; |
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}; |
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}; |
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# |
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# Copyright 2024 NXP |
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# |
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# SPDX-License-Identifier: Apache-2.0 |
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# |
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identifier: imx95_evk/mimx9596/m7/ddr |
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name: NXP i.MX95 EVK DDR variant |
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type: mcu |
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arch: arm |
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ram: 256 |
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toolchain: |
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- zephyr |
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- gnuarmemb |
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- xtools |
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supported: |
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- uart |
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vendor: nxp |
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# |
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# Copyright 2024 NXP |
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# |
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# SPDX-License-Identifier: Apache-2.0 |
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# |
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# clock-related configurations |
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CONFIG_CLOCK_CONTROL=y |
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# serial interface-related configurations |
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CONFIG_SERIAL=y |
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CONFIG_UART_INTERRUPT_DRIVEN=y |
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CONFIG_UART_CONSOLE=y |
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CONFIG_CONSOLE=y |
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# SCMI-related configurations |
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CONFIG_MBOX=y |
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CONFIG_MBOX_INIT_PRIORITY=0 |
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CONFIG_ARM_SCMI=y |
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# kernel-related configurations |
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CONFIG_XIP=n |
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